- 您现在的位置：买卖IC网 > PDF目录364793 > HB28H016RM2 IC Memory CompactFlash /PC-ATA Standard Users Manual/Device PDF资料下载
参数资料
| 型号： | HB28H016RM2 |
| 英文描述： | IC Memory CompactFlash /PC-ATA Standard Users Manual/Device |
| 中文描述： | 集成电路记忆的CompactFlash / PC的ATA标准用户手册/设备 |
| 文件页数： | 97/103页 |
| 文件大小： | 466K |
| 代理商： | HB28H016RM2 |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页第32页第33页第34页第35页第36页第37页第38页第39页第40页第41页第42页第43页第44页第45页第46页第47页第48页第49页第50页第51页第52页第53页第54页第55页第56页第57页第58页第59页第60页第61页第62页第63页第64页第65页第66页第67页第68页第69页第70页第71页第72页第73页第74页第75页第76页第77页第78页第79页第80页第81页第82页第83页第84页第85页第86页第87页第88页第89页第90页第91页第92页第93页第94页第95页第96页当前第97页第98页第99页第100页第101页第102页第103页
91
Status Register:
This is a read-only register that notifies the host of the card status when a
command is executed. If the card is configured in I/O card mode (INDEX = 1, 2, 3) and level
interrupt mode, the
IREQ
signal pin is negated by reading this register.
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
BSY
DRDY
DWF
DSC
DRQ
CORR
IDX
ERR
Bit
Name
Function
7
BSY (BuSY)
This bit is set to 1 when internal card processing is being
executed. When this bit is 1, the other bits in this register
are invalid.
6
DRDY (Drive ReaDY)
This bit is set to 1 when internal card processing ends and
access from the host can be accepted.
5
DWF (Drive Write Fault)
This bit is set to 1 if a write fault occurs in the card.
4
DSC (Drive Seek Complete)
This bit is set to 1 when a drive seek is completed.
3
DRQ (Data ReQuest)
This bit is set to 1 when preparations are completed for
data transfer between the host and the card.
2
CORR (CORRected data)
This bit is set to 1 when a correctable error has occurred in
internal card processing and the error has been corrected.
1
IDX (InDeX)
This bit is always cleared to 0.
0
ERR (ERRor)
This bit is set to 1 if an error occurs during processing of
the input command. Supplementary error information is set
in the error register. This bit is cleared by input of the next
command.
Alternate Status Register:
Physically, this register has the same bit assignments as the status
register. The difference is that the
IREQ
pin is not negated when this register is read.
相关PDF资料 |
PDF描述 |
|---|---|
| HB28B064A8H | Q&A on Hitachi CF and ATA Card Application Notes/Q&A |
| HB28B064C8C | Q&A on Hitachi CF and ATA Card Application Notes/Q&A |
| HB28B064C8HSR | Q&A on Hitachi CF and ATA Card Application Notes/Q&A |
| HB28B128C8HSR | Q&A on Hitachi CF and ATA Card Application Notes/Q&A |
| HB28B1700IA2SR | IDE Card Users Manual/Device |
相关代理商/技术参数 |
参数描述 |
|---|---|
| HB2A102K-S265B | 制造商:Hitano Enterprise Corp 功能描述:Bulk |
| HB2A102K-S565B | 制造商:Hitano Enterprise Corp 功能描述:Bulk |
| HB2A103K-S565B | 制造商:Hitano Enterprise Corp 功能描述: |
| HB2A122K-S265B | 制造商:Hitano Enterprise Corp 功能描述: |
| HB2A122K-S565B | 制造商:Hitano Enterprise Corp 功能描述:Bulk |
发布紧急采购，3分钟左右您将得到回复。