49
Table 3.20
Pin Functions when Using True-IDE Specifications
Abbre-
viation
Pin No.
CompactFlash
TM
Input/Output
Function
V
CC
GND
13, 38
Input
Power supply pins
1, 50
Input
GND pins
D0–D15
21, 22, 23, 2, 3,
4, 5, 6, 47, 48,
49, 27, 28, 29,
30, 31
Input/Output
Data bus. D0–D7 comprise the even byte of a
word, and D8–D15 the odd byte. D0 and D8 are
the respective LSBs.
A0–A10
20, 19, 18, 17,
16, 15, 14, 12,
11, 10, 8
Input
One register in the task file area can be selected
using A0–A2. Other address pins should be
dropped to GND on the host side.
CE2
is used to select the alternate status register
and device control register in the task file area.
CE1
is used to select other registers in the task file
area.
CE1
,
CE2
7, 32
Input
ATASEL
9
Input
True-IDE mode can be selected by dropping this
pin to GND on the host side.
WE
IORD
36
Input
Not used. Connect to V
CC
on the host side.
Used to read data from the I/O task file area. This
pin is only valid when the card is set as an I/O
card. Active-low.
34
Input
IOWR
35
Input
Used to write data to the I/O task file area. This pin
is only valid when the card is set as an I/O card.
Active-low.
INTRQ
37
Output
Pin for interrupt requests to the host. Active when
the output is high.
CD1
,
CD2
26, 25
Output
Used by the host to determine whether a card is
inserted. These pins are connected to GND inside
the card.
IOIS16
24
Output
A low level at this pin indicates that the card is
requesting a word data transfer cycle.
REG
PDIAG
44
Input
Not used. Connect to V
CC
on the host side.
The Pass Diagnostic signal in the master-slave
handshake protocol.
46
Output
DASP
45
Output
The Disk Active/Slave Present signal in the
master-slave handshake protocol.
RESET
41
Low-level input to this pin from the host causes a
hardware reset.