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参数资料
| 型号： | HFA3860A |
| 厂商： | Intersil Corporation |
| 英文描述： | Direct Sequence Spread Spectrum Baseband |
| 中文描述： | 直接序列扩频基带 |
| 文件页数： | 30/39页 |
| 文件大小： | 251K |
| 代理商： | HFA3860A |
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2-160
CONFIGURATION REGISTER 20 ADDRESS (50h) TX SIGNAL FIELD
Bits 7:3
R/W, But Not Used Internally
Bit 2
0 = Normal
1 = Transmit QPSK (2MBPS) with no header, bits 1:0 must be 00 (see Tech Brief 365)
Bits 1:0
TX data Rate. Must be set at least 2
μ
s before needed in TX frame. This selects TX signal field code from the registers above.
00 = DBPSK - 11 chip sequence (1MBPS)
01 = DQPSK - 11 chip sequence (2MBPS)
10 = BMBOK - modified 8 chip Walsh sequence (5.5MBPS)
11 = QMBOK - modified 8 chip Walsh sequence (11MBPS)
CONFIGURATION REGISTER 21 ADDRESS (54h) TX SERVICE FIELD
Bits 7:0
This 8-bit register is programmed with the 8-bit value of the Service field to be transmitted in the Header. This field is reserved
for future use and should always be set to 00h.
CONFIGURATION REGISTER 22 ADDRESS (58h) TX LENGTH FIELD (HIGH)
Bits 7:0
This 8-bit register contains the higher byte (bits 8-15) of the transmit Length Field described in the Header. This byte
combined with the lower byte indicates the number of microseconds the data packet will take.
CONFIGURATION REGISTER 23 ADDRESS (5Ch) TX LENGTH FIELD (LOW)
Bits 7:0
This 8-bit register contains the lower byte (bits 0-7) of the transmit Length Field described in the Header. This byte combined
with the higher byte indicates the number of microseconds the data packet will take.
CONFIGURATION REGISTER 24 ADDRESS (60h) RX STATUS
This read only register is provided for MACs that can’t process the header fields from the RXD port.
Bits 7:6
RX signal field detected
00 = DBPSK - 11 Chip Sequence (1MBPS)
01 = DQPSK - 11 Chip Sequence (2MBPS)
10 = BMBOK - modified 8 chip Walsh sequence (5.5MBPS)
11 = QMBOK - modified 8 chip Walsh sequence (11MBPS)
Bit 5
Search/Acquisition Status (set to 0 when RX_PE is inactive)
0 = Searching
1 = Carrier Acquired
Bit 4
SFD search status (set to 0 when RX_PE is inactive)
0 = Searching
1 = SFD Found
Bit 3
Signal Field Valid (set to 0 when RX_PE is inactive) signal field must be one of the 4 field values in CR 16 to CR19
0 = Not Valid
1 = Valid
Bit 2
Valid header CRC (set to 0 when RX_PE is inactive)
0 = Not Valid
1 = Valid
Bit 1
Antenna received on. Indicates antenna the receiver was on when last valid CRC check occurred.
0 = Antenna B
1 = Antenna A
Bit 0
Always 0
CONFIGURATION REGISTER 25 ADDRESS (64h) RX SERVICE FIELD STATUS
Bits 7:0
This register contains the detected received 8-bit value of the Service Field for the Header. This field is reserved for future
use. It should be the value programmed into register 21 of the transmitter.
HFA3860A
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PDF描述 |
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相关代理商/技术参数 |
参数描述 |
|---|---|
| HFA3860AEVAL1 | 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:Harris Corporation 功能描述: |
| HFA3860AIV | 制造商:INTERSIL 制造商全称:Intersil Corporation 功能描述:Direct Sequence Spread Spectrum Baseband |
| HFA3860AIV WAF | 制造商:Harris Corporation 功能描述: |
| HFA3860AIV96 | 制造商:INTERSIL 制造商全称:Intersil Corporation 功能描述:Direct Sequence Spread Spectrum Baseband |
| HFA3860B | 制造商:INTERSIL 制造商全称:Intersil Corporation 功能描述:nullDirect Sequence Spread Spectrum Baseband Processor |
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