参数资料
型号: HFA3860A
厂商: Intersil Corporation
英文描述: Direct Sequence Spread Spectrum Baseband
中文描述: 直接序列扩频基带
文件页数: 35/39页
文件大小: 251K
代理商: HFA3860A
2-165
Absolute Maximum Ratings
Supply Voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7.0V
Input, Output or I/O Voltage. . . . . . . . . . . .GND -0.5V to V
CC
+0.5V
ESD Classification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .Class 2
Thermal Information
Thermal Resistance (Typical, Note 5)
TQFP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Maximum Storage Temperature Range . . . . . . . . . .-65
o
C to 150
o
C
Maximum Junction Temperature. . . . . . . . . . . . . . . . . . . . . . . 150
o
C
Maximum Lead Temperature (Soldering 10s). . . . . . . . . . . . . 300
o
C
(Lead Tips Only)
Operating Conditions
Voltage Range . . . . . . . . . . . . . . . . . . . . . . . . . . . .+2.70V to +3.60V
Temperature Range. . . . . . . . . . . . . . . . . . . . . . . . . . -40
o
C to 85
o
C
θ
JA
(
ο
C/W)
80
Die Characteristics
Gate Count . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33,000 Gates
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
5.
θ
JA
is measured with the component mounted on an evaluation PC board in free air.
DC Electrical Specifications
V
CC
= 3.0V to 3.3V
±
10%, T
A
= -40
o
C to 85
o
C
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
UNITS
Power Supply Current
I
CCOP
V
CC
= 3.6V, CLK Frequency 44MHz
(Notes 6, 7)
-
30
40
mA
Standby Power Supply Current
I
CCSB
I
I
I
O
V
IH
V
IL
V
OH
V
OL
C
IN
C
OUT
V
CC
= Max, Outputs Not Loaded
V
CC
= Max, Input = 0V or V
CC
V
CC
= Max, Input = 0V or V
CC
V
CC
= Max, Min
V
CC
= Min, Max
I
OH
= -1mA, V
CC
= Min
I
OL
= 2mA, V
CC
= Min
CLK Frequency 1MHz. All measurements
referenced to GND. T
A
= 25
o
C, Note 7
-
0.5
1
mA
Input Leakage Current
-10
1
10
μ
A
Output Leakage Current
-10
1
10
μ
A
Logical One Input Voltage
0.7 V
CC
-
-
-
V
Logical Zero Input Voltage
-
V
CC
/3
-
V
Logical One Output Voltage
V
CC
-0.2
-
-
V
Logical Zero Output Voltage
.2
0.2
V
Input Capacitance
-
5
10
pF
Output Capacitance
-
5
10
pF
NOTES:
6. Output load 30pF.
7. Not tested, but characterized at initial design and at major process/design changes.
AC Electrical Specifications
V
CC
= 3.0V to 3.3V
±
10%, T
A
= -40
o
C to 85
o
C (Note 8)
PARAMETER
SYMBOL
MCLK = 44MHz
UNITS
MIN
MAX
MCLK Period
t
CP
22
-
ns
MCLK Duty Cycle
43/57
57/43
%
Rise/Fall (All Outputs)
-
10
ns (Notes 9, 10)
TX_PE to Iout/Qout (1st Valid Chip)
t
D1
t
TLP
t
TCD
t
RC
t
TDS
t
TDH
t
PEH
t
PEH
t
PEH
t
PEH
t
RI
t
ME
2.18
2.3
μ
s (Notes 9, 11)
TX_PE Inactive Width
2.22
-
μ
s (Notes 9, 12)
TX_CLK Width Hi or Low
40
-
ns
TX_RDY Active to 1st TX_CLK Hi
260
-
ns
Setup TXD to TX_CLK Hi
30
-
ns
Hold TXD to TX_CLK Hi
0
-
ns
TX_CLK to TX_PE Inactive (1MBps)
0
965
ns (Notes 9, 22)
TX_CLK to TX_PE Inactive (2MBps)
0
420
ns (Notes 9, 22)
TX_CLK to TX_PE Inactive (5.5MBps)
0
160
ns (Notes 9, 22)
TX_CLK to TX_PE Inactive (11MBps)
0
65
ns (Notes 9, 22)
TX_RDY Inactive To Last Chip of MPDU Out
-20
20
ns
TXD Modulation Extension
2
-
μ
s (Notes 9, 13)
HFA3860A
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