参数资料
型号: HY5DU561622DT-6
厂商: HYNIX SEMICONDUCTOR INC
元件分类: DRAM
英文描述: 16M X 16 DDR DRAM, 0.7 ns, PDSO66
封装: 0.400 X 0.875 INCH, 0.65 MM PITCH, TSOP2-66
文件页数: 5/28页
文件大小: 814K
代理商: HY5DU561622DT-6
Rev. 0.6 / Mar. 2005
13
HY5DU561622DT
CKE FUNCTION TRUTH TABLE
Note :
When CKE=L, all DQ and DQS must be in Hi-Z state.
1. CKE and /CS must be kept high for a minimum of 200 stable input clocks before issuing any command.
2. All command can be stored after 2 clocks from low to high transition of CKE.
3. Illegal if CK is suspended or stopped during the power down mode.
4. Self refresh can be entered only from the all banks idle state.
5. Disabling CK may cause malfunction of any bank which is in active state.
Current
State
CKEn-1
CKEn
/CS
/RAS
/CAS
/WE
/ADD
Action
SELF
REFRESH1
H
X
XX
XXX
INVALID
L
H
X
Exit self refresh, enter idle after tSREX
L
H
L
H
X
Exit self refresh, enter idle after tSREX
LH
L
H
L
X
ILLEGAL
LH
L
H
L
X
ILLEGAL
L
H
L
XXX
ILLEGAL
L
XX
XXX
NOP, continue self refresh
POWER
DOWN2
H
X
XX
XXX
INVALID
L
H
X
Exit power down, enter idle
L
H
L
H
X
Exit power down, enter idle
LH
L
H
L
X
ILLEGAL
LH
L
H
L
X
ILLEGAL
L
H
L
XXX
ILLEGAL
L
XX
XXX
NOP, continue power down mode
ALL BANKS
IDLE4
H
X
See operation command truth table
H
L
LLL
H
X
Enter self refresh
H
L
H
X
Exit power down
H
L
H
X
Exit power down
HL
L
H
L
X
ILLEGAL
HL
L
H
L
X
ILLEGAL
HL
L
H
X
ILLEGAL
H
L
LLLL
X
ILLEGAL
L
XX
XXX
NOP
ANY STATE
OTHER
THAN
ABOVE
H
X
See operation command truth table
H
L
XX
XXX
ILLEGAL5
L
H
XX
XXX
INVALID
L
XX
XXX
INVALID
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