参数资料
型号: HY5PS1G831CLFP-Y5
厂商: HYNIX SEMICONDUCTOR INC
元件分类: DRAM
英文描述: 1Gb DDR2 SDRAM
中文描述: 128M X 8 DDR DRAM, 0.45 ns, PBGA60
封装: ROHS COMPLIANT, FBGA-60
文件页数: 14/37页
文件大小: 539K
代理商: HY5PS1G831CLFP-Y5
Rev. 0.2 / Dec 2006
14
HY5PS1G431C(L)FP
HY5PS1G831C(L)FP
HY5PS1G1631C(L)FP
3.3 Output Buffer Characteristics
3.3.1 Output AC Test Conditions
Note:
1. The VDDQ of the device under test is referenced.
3.3.2 Output DC Current Drive
Note:
1. V
DDQ
= 1.7 V; V
OUT
= 1420 mV. (V
OUT
- V
DDQ
)/I
OH
must be less than 21 ohm for values of V
OUT
between V
DDQ
and V
DDQ
- 280 mV.
2. V
DDQ
= 1.7 V; V
OUT
= 280 mV. V
OUT
/I
OL
must be less than 21 ohm for values of V
OUT
between 0 V and 280 mV.
3. The dc value of V
REF
applied to the receiving device is set to V
TT
4.
The values of I
OH(dc)
and I
OL(dc)
are based on the conditions given in Notes 1 and 2. They are used to test
device drive current capability to ensure V
IH
min plus a noise margin and V
IL
max minus a noise margin are
delivered to an SSTL_18 receiver. The actual current values are derived by shifting the desired driver operating
point (see Section 3.3) along a 21 ohm load line to define a convenient driver current for measurement.
Symbol
V
OTR
Parameter
SSTL_ 18 Class II
0.5 * V
DDQ
Units
V
Notes
1
Output Timing Measurement Reference Level
Symbol
I
OH(dc)
I
OL(dc)
Parameter
SSTl_ 18
- 13.4
Units
mA
Notes
1, 3, 4
Output Minimum Source DC Current
Output Minimum Sink DC Current
13.4
mA
2, 3, 4
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