参数资料
型号: IBM0116160
厂商: IBM Microeletronics
英文描述: 1M x 16 12/8 DRAM(16M位 动态RAM(带20条地址线,其中12条为行地址选通,8条为列地址选通))
中文描述: 100万× 16 12 / 8的DRAM(1,600位动态随机存储器(带20条地址线,其中12条为行地址选通,8条为列地址选通))
文件页数: 10/27页
文件大小: 489K
代理商: IBM0116160
IBM0116160
IBM0116160B
1M x 16 12/8 DRAM
IBM0116160M
IBM0116160P
IBM Corporation. All rights reserved.
Use is further subject to the provisions at the end of this document.
Page 10 of 27
43G9618
SA14-4207-06
Revised 4/97
Read-Modify-Write Cycle
Symbol
Parameter
-50
-60
Units
Notes
Min.
Max.
Min.
Max.
t
RWC
Read-Modify-Write Cycle Time
128
150
ns
t
RWD
RAS to WE Delay Time
68
80
ns
1
t
CWD
CAS to WE Delay Time
31
35
ns
1
t
AWD
Column Address to WE Delay Time
43
50
ns
1
t
OEH
OE Command Hold Time
13
15
ns
1. t
WCS
, t
RWD
, t
CWD
, t
AWD
and t
CPW
are not restrictive operating parameters. They are included in the data sheet as electrical charac-
teristics only. If t
WCS
t
WCS
(min), the cycle is an early write cycle and the data pin will remain open circuit (high impedance)
through the entire cycle. If t
RWD
t
RWD
(min), t
CWD
t
CWD
(min), t
AWD
t
AWD
(min), and t
CPW
t
CPW
(min)(Fast Page Mode), the
cycle is a Read-Modify-Write cycle and the data out will contain data read from the selected cell. If neither of the above sets of con-
ditions are satisfied, the condition of the data out (at access time) is indeterminate.
Fast Page Mode Cycle
Symbol
Parameter
-50
-60
Units
Notes
Min.
Max.
Min.
Max.
t
PC
Fast Page Mode Cycle Time
35
40
ns
t
RASP
Fast Page Mode RAS Pulse Width
50
200K
60
200K
ns
t
CPA
Access Time from CAS Precharge
28
35
ns
1
t
CPRH
RAS Hold Time from CAS Precharge
30
35
ns
1. Measured with the specified current load and 100pF.
Fast Page Mode Read-Modify-Write Cycle
Symbol
Parameter
-50
-60
Units
Notes
Min.
Max.
Min.
Max.
t
PRWC
Fast Page Mode Read-Modify-Write
Cycle Time
71
80
ns
t
CPW
WE Delay Time from CAS Precharge
48
55
ns
1
1. t
WCS
, t
RWD
, t
CWD
, t
AWD
and t
CPW
are not restrictive operating parameters. They are included in the data sheet as electrical charac-
teristics only. If t
WCS
t
WCS
(min), the cycle is an early write cycle and the data pin will remain open circuit (high impedance)
through the entire cycle. If t
RWD
t
RWD
(min), t
CWD
t
CWD
(min), t
AWD
t
AWD
(min), and t
CPW
t
CPW
(min)(Fast Page Mode), the
cycle is a Read-Modify-Write cycle and the data out will contain data read from the selected cell. If neither of the above sets of con-
ditions are satisfied, the condition of the data out (at access time) is indeterminate.
Discontinued (9/98 - last order; 3/99 last ship)
相关PDF资料
PDF描述
IBM0116160B 1M x 16 12/8 DRAM(16M位 动态RAM(带20条地址线,其中12条为行地址选通,8条为列地址选通))
IBM0116160M 1M x 16 12/8 DRAM(16M位 动态RAM(带20条地址线,其中12条为行地址选通,8条为列地址选通))
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