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参数资料
| 型号： | IBM25PPC405GPR3BB400Z |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 32-BIT, 400 MHz, RISC PROCESSOR, PBGA456 |
| 封装： | 35 X 35 MM, ENHANCED, PLASTIC, BGA-456 |
| 文件页数： | 36/58页 |
| 文件大小： | 1264K |
| 代理商： | IBM25PPC405GPR3BB400Z |
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Preliminary
PowerPC 405GPr Embedded Processor Data Sheet
3/14/03
Page 41 of 58
DC Electrical Characteristics
Parameter
Symbol
Minimum
Typical
Maximum
Unit
Active Operating Current (VDD)–266MHz
IDD
300
610
mA
Active Operating Current (VDD)–333MHz
IDD
325
690
mA
Active Operating Current (VDD)–400MHz
IDD
355
770
mA
Active Operating Current (OVDD)IODD
45
200
mA
PLL VDD Input current
IPLL
16
23
mA
Active Operating Power–266 MHz
PDD
0.72
1.92
W
Active Operating Power–333 MHz
PDD
0.76
2.07
W
Active Operating Power–400 MHz
PDD
0.82
2.23
W
Note:
1. The maximum current and power values listed above are not guaranteed to be the highest obtainable. These values are
dependent on many factors including the type of applications running, clock rates, use of internal functional capabilities, external
interface usage, case temperature, and the power supply voltages. Your specific application can produce significantly different
results. VDD (logic) current and power are primarily dependent on the applications running and the use of internal chip functions
(DMA, PCI, Ethernet, and so on). OVDD (I/O) current and power are primarily dependent on the capacitive loading, frequency, and
utilization of the external buses. The following information provides details about the conditions under which the listed values were
obtained:
a. In general, the values were measured using a PPC405GPr Evaluation Board with four PCI devices, an external bus master on
the peripheral bus, and external wrap-back on the Ethernet port. For all CPU clock rates, PLB = 133.3MHz, OPB = PerClk =
66.6 MHz, PCI = SysClk = 33.3MHz.
b. Typical current and power are characterized at VDD = +1.8V, OVDD = +3.3V, and TC = +36°C while running various
applications under the Linux operating system.
c. Maximum current and power are characterized at VDD = +1.9V, OVDD = +3.6V, and TC = +85°C while running applications
designed to maximize CPU power consumption. An external PCI master heavily loads the PCI bus with transfers targeting
SDRAM while the internal DMA controller further increases SDRAM bus traffic.
2. AVDD should be derived from VDD using the following circuit:
VDD
C1
C2
C3
AVDD
L1
L1 – 2.2
H SMT inductor (equivalent to MuRata
LQH3C2R2M34) or SMT chip ferrite bead (equivalent
to MuRata BLM31A700S)
C1 – 3.3
F SMT tantalum
C2 – 0.1
F SMT monolithic ceramic capacitor with X7R
dielectric or equivalent
C3 – 0.01
F SMT monolithic ceramic capacitor with X7R
dielectric or equivalent
+
AGND
GND
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相关代理商/技术参数 |
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| IBM25PPC405-GPR-3JB266Z | 制造商:IBM 功能描述: |
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