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参数资料
| 型号： | ICS1527G-60LFTR |
| 元件分类： | 时钟及定时 |
| 英文描述： | PLL BASED CLOCK DRIVER, 2 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO16 |
| 封装： | 4.40 MM, 0.65 MM PITCH, LEAD FREE, TSSOP-16 |
| 文件页数： | 8/11页 |
| 文件大小： | 620K |
| 代理商： | ICS1527G-60LFTR |
MDS 1527 E
6
Revision 060204
Integrated Circuit Systems, 525 Race Street, San Jose, CA 95126, tel (408) 297-1201
www.icst.com
Section 3 Register map summary
ICS1527 Data Sheet
07h
Reserved
0-6
Reserved
7
0
Part requires a 0 for correct operation
08h
Reset
Write
Reserved
0-7
0
Writing 5Ah resets part and commits values written to word
addresses 01h-03h and 05h
09-0Fh
Reserved
Read
Reserved
0-7
Reserved
10h
Chip Ver
Read
Reserved
0-7
Reserved
11h
Chip Rev
Read
Chip Rev
0-7
01
Reserved
12h
Rd_Reg
Read
Reserved
0
N/A
Reserved
PLL_Lock
1
N/A
PLL Lock Status
0=Unlocked, 1=Locked
Reserved
2-7
0
Reserved
*. Written values to these registers do not take effect immediately, but require a commit via register 08h
Word
Address
Name
Access
Bit Name
Bit#
Reset
Value
Description
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| ICS1531 | 制造商:ICS 制造商全称:ICS 功能描述:Triple 8-bit MSPS A/D Converters with Line-Locked Clock Generator |
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