参数资料
型号: ICS1527G-60LFTR
元件分类: 时钟及定时
英文描述: PLL BASED CLOCK DRIVER, 2 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO16
封装: 4.40 MM, 0.65 MM PITCH, LEAD FREE, TSSOP-16
文件页数: 9/11页
文件大小: 620K
代理商: ICS1527G-60LFTR
MDS1527 E
7
Revision 060204
Integrated Circuit Systems, 525 Race Street, San Jose, CA 95126, tel (408) 297-1201
www.icst.com
Section 4 Programming
ICS1527 Data Sheet
Section 4 Programming
4.1 Industry-Standard I2C Serial Bus: Data Format
Figure 4-1 ICS1527 Data Format for I2C 2-Wire Serial Bus
Notes:
The ICS1527 uses 16 byte pages (00h-0Fh is the first page, 10h-1Fh is the second page). Writing or reading
beyond the end of page yields undefined results.
The ICS1527 has a device address of 010011B, where B is the state of the I2CADR pin.
S
T
A
R
T
0 A
C
K
A
C
K
A
C
K
Single/m ultiple register w rite (page w rite)
W ord address
D ata (0)
A
C
K
D ata (n)
S
T
O
P
...
S
T
A
R
T
0 A
C
K
A
C
K
A
C
K
S ingle/m ultiple register read
W ord address
D ata (0)
D ata (n)
S
T
O
P
...
1 A
C
K
N
O
A
C
K
S
T
A
R
T
A
C
K
S equential single/m ultiple register read
Data (0)
Data (n)
S
T
O
P
...
1 A
C
K
N
O
A
C
K
S
T
A
R
T
0 1 0 0 1 1 B
D evice address
0 1 0 0 1 1 B
M aster drives line
S lave drives line
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