参数资料
型号: ICS94252YFLF-T
厂商: INTEGRATED DEVICE TECHNOLOGY INC
元件分类: 时钟产生/分配
英文描述: 133.33 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO48
封装: 0.300 INCH, LEAD FREE, MO-118, SSOP-48
文件页数: 19/19页
文件大小: 136K
代理商: ICS94252YFLF-T
9
ICS94252
0456B—04/12/04
Byte 13: Spread Sectrum Control Register
Byte 14:
Spread Sectrum Control Register
Note: Please utilize software utility provided by ICS
Application Engineering to configure spread
spectrum. Incorrect spread percentage may cause
system failure.
t
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BD
W
Pn
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7
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7
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6
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6
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5
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5
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4
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4
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3
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3
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2
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2
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1
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0
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6
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5
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4
t
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2
1
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3
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Note: Please utilize software utility provided by ICS
Application Engineering to configure spread
spectrum. Incorrect spread percentage may cause
system failure.
Byte 15: Output Skew Control
Byte 16: Output Skew Control
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7
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1
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0
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1
:
2
1
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3
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0
:
1
(
P
G
A
2
t
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B1
1
t
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B0
0
t
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B0
Byte 17: Output Rise/FallTime Select Register
Byte 18: Output Rise/Fall Time Select Register
t
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BD
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Pn
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p
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7
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1
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0
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6
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1
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2
1
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0
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Notes:
1. PWD = Power on Default
2. The power on default for byte 13-20 depends on the harware (latch inputs FS(4:0)) or I
2C (Byte 0 bit (1:7)) setting.
Be sure to read back and re-write the values of these 8 registers when VCO frequency change is desired for the first
pass.
3. If Byte 8 bit 7 is driven to "1" meaning programming is intended, Byte 21-24 will lose their default power up value.
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