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参数资料
| 型号： | ICSSSTUA32S865AHLF-T |
| 厂商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分类： | 锁存器 |
| 英文描述： | SSTU SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, PBGA160 |
| 封装： | 9 X 13 MM, LEAD FREE, BGA-160 |
| 文件页数： | 14/17页 |
| 文件大小： | 199K |
| 代理商： | ICSSSTUA32S865AHLF-T |
6
ICSSSTUA32S865A
1053A—03/21/05
Parity Functionality Block Diagram
D
22
D
LATCHING AND
RESET FUNCTION
see Note (1)
PTYERR#
D
QnA
QnB
Dn
PARIN
CLOCK
Q
002aaa417
22
(1) This function holds the error for two
cycles. See functional description and
timing diagram.
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相关代理商/技术参数 |
参数描述 |
|---|---|
| ICSSSTUA32S869B | 制造商:ICS 制造商全称:ICS 功能描述:14-Bit Configurable Registered Buffer for DDR2 |
| ICSSSTUAF32865A | 制造商:IDT 制造商全称:Integrated Device Technology 功能描述:25-BIT CONFIGURABLE REGISTERED BUFFER FOR DDR2 |
| ICSSSTUAF32865AHLFT | 制造商:IDT 制造商全称:Integrated Device Technology 功能描述:25-BIT CONFIGURABLE REGISTERED BUFFER FOR DDR2 |
| ICSSSTUAF32866B | 制造商:IDT 制造商全称:Integrated Device Technology 功能描述:25-BIT CONFIGURABLE REGISTERED BUFFER FOR DDR2 |
| ICSSSTUAF32866BHLFT | 制造商:IDT 制造商全称:Integrated Device Technology 功能描述:25-BIT CONFIGURABLE REGISTERED BUFFER FOR DDR2 |
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