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参数资料
| 型号： | ICSSSTUA32S865AHLF-T |
| 厂商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分类： | 锁存器 |
| 英文描述： | SSTU SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, PBGA160 |
| 封装： | 9 X 13 MM, LEAD FREE, BGA-160 |
| 文件页数： | 17/17页 |
| 文件大小： | 199K |
| 代理商： | ICSSSTUA32S865AHLF-T |
9
ICSSSTUA32S865A
1053A—03/21/05
Figure 6 — RESET# switches fr om H to L
(1) After RESET# is switched from HIGH to LOW , all data and cloc input signal must be set and held at valid logic
levels (not floating) for a minimum tim of tINACT (max.).
CK (1)
DCSn#
RESET#
tINACT
tRPHL
RESET# to Q
PARIN (1)
tRPLH
RESET# to PTYERR#
PTYERR#
H, L, or X
H or L
CK# (1)
Dn (1)
Qn
002aaa985
Register Timing
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相关代理商/技术参数 |
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| ICSSSTUA32S869B | 制造商:ICS 制造商全称:ICS 功能描述:14-Bit Configurable Registered Buffer for DDR2 |
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| ICSSSTUAF32865AHLFT | 制造商:IDT 制造商全称:Integrated Device Technology 功能描述:25-BIT CONFIGURABLE REGISTERED BUFFER FOR DDR2 |
| ICSSSTUAF32866B | 制造商:IDT 制造商全称:Integrated Device Technology 功能描述:25-BIT CONFIGURABLE REGISTERED BUFFER FOR DDR2 |
| ICSSSTUAF32866BHLFT | 制造商:IDT 制造商全称:Integrated Device Technology 功能描述:25-BIT CONFIGURABLE REGISTERED BUFFER FOR DDR2 |
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