参数资料
型号: ICSSSTUA32S865AHLF-T
厂商: INTEGRATED DEVICE TECHNOLOGY INC
元件分类: 锁存器
英文描述: SSTU SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, PBGA160
封装: 9 X 13 MM, LEAD FREE, BGA-160
文件页数: 15/17页
文件大小: 199K
代理商: ICSSSTUA32S865AHLF-T
7
ICSSSTUA32S865A
1053A—03/21/05
Figure 4 — RESET# switches fr om L to H
(1) After RESET# is switched from LOW to HIGH, all data and PARIN input signals must be set and held LO W for
minimum time of tACT (max.) to avoid false error.
CK#
Dn (1)
Qn
tsu
002aaa983
CK
n
n + 1
n + 2
n + 3
n + 4
DCSn#
RESET#
tACT
th
tPDM, tPDMSS
CK to Q
PARIN
tsu
th
tPHL, tPLH
CK to PTYERR#
tPHL
CK to PTYERR#
PTYERR#
H, L, or X
H or L
Register Timing
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