参数资料
型号: IDT70P258L55BYI
厂商: IDT, Integrated Device Technology Inc
文件页数: 10/23页
文件大小: 0K
描述: IC SRAM 128KBIT 55NS 100BGA
标准包装: 90
格式 - 存储器: RAM
存储器类型: SRAM - 双端口,异步
存储容量: 128K(8K x 16)
速度: 55ns
接口: 并联
电源电压: 1.7 V ~ 1.9 V
工作温度: -40°C ~ 85°C
封装/外壳: 100-VFBGA
供应商设备封装: 100-CABGA(6x6)
包装: 托盘
其它名称: 70P258L55BYI
IDT70P258/248L
Low Power 1.8V 8K/4K x 16 Dual-Port Static RAM
Industrial Temperature Range
AC Electrical Characteristics Over the
Operating Temperature and Supply Voltage (4)
70P258/248
Ind'l Only
Symbol
Parameter
Min.
Max.
Unit
WRITE CYCLE
t WC
t EW
t AW
Write Cycle Time
Chip Enable to End-of-Write (3)
Address Valid to End-of-Write
55
45
45
____
____
____
ns
ns
ns
t AS
Address Set-up Time
(3)
0
____
ns
t WP
t WR
t DW
t HZ
Write Pulse Width
Write Recovery Time
Data Valid to End-of-Write
Output High-Z Time (1,2)
40
0
30
____
____
____
____
25
ns
ns
ns
ns
t DH
Data Hold Time
(4)
0
____
ns
Write Enable to Output in High-Z
t WZ
(1,2)
____
25
ns
t OW
t SWRD
t SPS
Output Active from End-of-Write
SEM Flag Write to Read Time
SEM Flag Contention Window
(1,2,4)
0
10
10
____
____
____
ns
ns
ns
NOTES:
5675 tbl 12
1. Transition is measured 0mV from Low or High-impedance voltage with Output Test Load.
2. This parameter is guaranteed by device characterization, but is not production tested.
3. To access SRAM, CE = V IL , UB or LB = V IL , SEM = V IH . To access semaphore, CE = V IH or UB and LB = V IH and SEM = V IL . Either condition must be valid for
the entire t EW time.
4. The specification for t DH must be met by the device supplying write data to the SRAM under all operating conditions. Although t DH and t OW values will vary over
voltage and temperature, the actual t DH will always be smaller than the actual t OW .
10
6.42
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