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| 型号： | IDT72V3622L10PF8 |
| 厂商： | IDT, Integrated Device Technology Inc |
| 文件页数： | 4/29页 |
| 文件大小： | 0K |
| 描述： | IC BIFIFO 256X36X2 10NS 120-TQFP |
| 标准包装： | 750 |
| 系列： | 72V |
| 功能： | 异步，同步 |
| 存储容量： | 18.4K（256 x 36 x 2） |
| 数据速率： | 100MHz |
| 访问时间： | 10ns |
| 电源电压： | 3 V ~ 3.6 V |
| 工作温度： | 0°C ~ 70°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 120-LQFP |
| 供应商设备封装： | 120-TQFP（14x14） |
| 包装： | 带卷 (TR) |
| 其它名称： | 72V3622L10PF8 |
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12
IDT72V3622/72V3632/72V3642 CMOS 3.3V SyncBiFIFOTM
256 x 36 x 2, 512 x 36 x 2, 1,024 x 36 x 2
COMMERCIAL TEMPERATURERANGE
InIDTStandardmode,fromthetimeawordiswrittentoaFIFO,theEmpty
Flagwillindicatethepresenceofdataavailableforreadinginaminimumoftwo
cyclesoftheEmptyFlagsynchronizingclock.Therefore,anEmptyFlagisLOW
if a word in memory is the next data to be sent to the FlFO output register and
two cycles of the port Clock that reads data from the FIFO have not elapsed
sincethetimethewordwaswritten.TheEmptyFlagoftheFIFOremainsLOW
until the second LOW-to-HIGH transition of the synchronizing clock occurs,
forcing the Empty Flag HIGH; only then can data be read.
ALOW-to-HIGHtransitiononanEmpty/OutputReadyflagsynchronizing
clockbeginsthefirstsynchronizationcycleofawriteiftheclocktransitionoccurs
attimetSKEW1orgreaterafterthewrite.Otherwise,thesubsequentclockcycle
canbethefirstsynchronizationcycle(seeFigures8through11forEFA/ORA
and EFB/ORB timing diagrams).
FULL/INPUT READY FLAGS (FFA/IRA, FFB/IRB)
Thisisadualpurposeflag.InFWFTmode,theInputReady(IRAandIRB)
function is selected. In IDT Standard mode, the Full Flag (FFA and FFB)
functionisselected.Forbothtimingmodes,whentheFull/InputReadyflagis
HIGH,amemorylocationisfreeintheFIFOtoreceivenewdata.Nomemory
locationsarefreewhentheFull/InputReadyflagisLOWandattemptedwrites
to the FIFO are ignored.
Synchronized
Number of Words in FIFO(1,2)
to CLKB
to CLKA
IDT72V3622(3)
IDT72V3632(3)
IDT72V3642(3)
EFB/ORB
AEB
AFA
FFA/IRA
000
L
H
1 to X1
H
L
H
(X1+1) to [256-(Y1+1)]
(X1+1) to [512-(Y1+1)]
(X1+1) to [1,024-(Y1+1)]
H
(256-Y1) to 255
(512-Y1) to 511
(1,024-Y1) to 1,023
H
L
H
256
512
1,024
H
L
new data is present in the FIFO output register. When the Output Ready flag
is LOW, the previous data word is present in the FIFO output register and
attempted FIFO reads are ignored.
In the IDT Standard mode, the Empty Flag (EFA, EFB) function is
selected. When the Empty Flag is HIGH, data is available in the FIFO’s RAM
for reading to the output register.WhentheEmptyFlagisLOW,theprevious
datawordispresentintheFIFOoutputregisterandattemptedFIFOreadsare
ignored.
The Empty/Output Ready flag of a FIFO is synchronized to the port clock
that reads data from its array. For both the FWFT and IDT Standard modes,
the FIFO read pointer is incremented each time a new word is clocked to its
outputregister.ThestatemachinethatcontrolsanOutputReadyflagmonitors
a write pointer and read pointer comparator that indicates when the FIFO
memorystatusisempty,empty+1,orempty+2.
In FWFT mode, from the time a word is written to a FIFO, it can be shifted
to the FIFO output register in a minimum of three cycles of the Output Ready
flagsynchronizingclock.Therefore,anOutputReadyflagisLOWifawordin
memoryisthenextdatatobesenttotheFlFOoutputregisterandthreecycles
oftheportClockthatreadsdatafromtheFIFOhavenotelapsedsincethetime
the word was written. The Output Ready flag of the FIFO remains LOW until
thethirdLOW-to-HIGHtransitionofthesynchronizingclockoccurs,simulta-
neouslyforcingtheOutputReadyflagHIGHandshiftingthewordtotheFIFO
outputregister.
NOTES:
1. When a word loaded to an empty FIFO is shifted to the output register, its previous FIFO memory location is free.
2. Data in the output register does not count as a "word in FIFO memory". Since in FWFT mode, the first word written to an empty FIFO goes unrequested to the output register (no
read operation necessary), it is not included in the FIFO memory count.
3. X1 is the Almost-Empty offset for FIFO1 used by AEB. Y1 is the Almost-Full offset for FIFO1 used by AFA. Both X1 and Y1 are selected during a reset of FIFO1 or programmed from
port A.
4. The ORB and IRA functions are active during FWFT mode; the EFB and FFA functions are active in IDT Standard mode.
TABLE 4 — FIFO1 FLAG OPERATION (IDT STANDARD AND FWFT MODES)
Synchronized
Number of Words in FIFO(1,2)
to CLKA
to CLKB
IDT72V3622(3)
IDT72V3632(3)
IDT72V3642(3)
EFA/ORA
AEA
AFB
FFB/IRB
000
L
H
1 to X2
H
L
H
(X2+1) to [256-(Y2+1)]
(X2+1) to [512-(Y2+1)]
(X2+1) to [1,024-(Y2+1)]
H
(256-Y2) to 255
(512-Y2) to 511
(1,024-Y2) to 1,023
H
L
H
256
512
1,024
H
L
NOTES:
1. When a word loaded to an empty FIFO is shifted to the output register, its previous FIFO memory location is free.
2. Data in the output register does not count as a "word in FIFO memory". Since in FWFT mode, the first word written to an empty FIFO goes unrequested to the output register (no
read operation necessary), it is not included in the FIFO memory count.
3. X2 is the Almost-Empty offset for FIFO2 used by AEA. Y2 is the Almost-Full offset for FIFO2 used by AFB. Both X2 and Y2 are selected during a reset of FIFO2 or programmed from
port A.
4. The ORA and IRB functions are active during FWFT mode; the EFA and FFB functions are active in IDT Standard mode.
TABLE 5 — FIFO2 FLAG OPERATION (IDT STANDARD AND FWFT MODES)
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相关代理商/技术参数 |
参数描述 |
|---|---|
| IDT72V3622L10PFG | 制造商:Integrated Device Technology Inc 功能描述:IC BIFIFO 256X36X2 10NS 120-TQFP |
| IDT72V3622L10PFG8 | 制造商:Integrated Device Technology Inc 功能描述:IC BIFIFO 256X36X2 10NS 120-TQFP |
| IDT72V3622L10PQF | 功能描述:IC BIFIFO 256X36X2 10NS 132-PQFP RoHS:否 类别:集成电路 (IC) >> 逻辑 - FIFO 系列:72V 标准包装:90 系列:7200 功能:同步 存储容量:288K（16K x 18） 数据速率:100MHz 访问时间:10ns 电源电压:4.5 V ~ 5.5 V 工作温度:0°C ~ 70°C 安装类型:表面贴装 封装/外壳:64-LQFP 供应商设备封装:64-TQFP（14x14） 包装:托盘 其它名称:72271LA10PF |
| IDT72V3622L15PF | 功能描述:IC BIFIFO 256X36X2 15NS 120-TQFP RoHS:否 类别:集成电路 (IC) >> 逻辑 - FIFO 系列:72V 标准包装:90 系列:7200 功能:同步 存储容量:288K（16K x 18） 数据速率:100MHz 访问时间:10ns 电源电压:4.5 V ~ 5.5 V 工作温度:0°C ~ 70°C 安装类型:表面贴装 封装/外壳:64-LQFP 供应商设备封装:64-TQFP（14x14） 包装:托盘 其它名称:72271LA10PF |
| IDT72V3622L15PF8 | 功能描述:IC BIFIFO 256X36X2 15NS 120-TQFP RoHS:否 类别:集成电路 (IC) >> 逻辑 - FIFO 系列:72V 标准包装:90 系列:7200 功能:同步 存储容量:288K（16K x 18） 数据速率:100MHz 访问时间:10ns 电源电压:4.5 V ~ 5.5 V 工作温度:0°C ~ 70°C 安装类型:表面贴装 封装/外壳:64-LQFP 供应商设备封装:64-TQFP（14x14） 包装:托盘 其它名称:72271LA10PF |
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