参数资料
型号: IDT82V3255
厂商: Integrated Device Technology, Inc.
英文描述: WAN PLL
中文描述: 广域网锁相环
文件页数: 41/127页
文件大小: 868K
代理商: IDT82V3255
IDT82V3255
WAN PLL
Functional Description
41
June 19, 2006
3.16
POWER SUPPLY FILTERING TECHNIQUES
Figure 12. IDT82V3255 Power Decoupling Scheme
To achieve optimum jitter performance, power supply filtering is
required to minimize supply noise modulation of the output clocks. The
common sources of power supply noise are switch power supplies and
the high switching noise from the outputs to the internal PLL. The
82V3255 provides separate VDDA power pins for the internal analog
PLL, VDD_DIFF for the differential output driver circuit and VDDD pins
for the core logic as well as I/O driver circuits.
To minimize switching power supply noise generated by the switch-
ing regulator, the power supply output should be filtering with sufficient
bulk capacity to minimize ripple and 0.1 uF (0402 case size, ceramic)
caps to filter out the switching transients.
For the 82V3255, the decoupling for VDDA, VDD_DIFF and VDDD
are handled individually. VDDD, VDD_DIFF and VDDA should be indi-
vidually connected to the power supply plane through vias, and bypass
capacitors should be used for each pin. Figure 12 illustrated how bypass
capacitor and ferrite bead should be connected to power pins.
The analog power supply VDDA and VDD_DIFF should have low
impedance. This can be achieved by using one 10 uF (1210 case size,
ceramic) and at least four 0.1 uF (0402 case size, ceramic) capacitors in
parallel. The 0.1 uF (0402 case size, ceramic) capacitors must be
placed right next to the VDDA and VDD_DIFF pins as close as possible.
Note that the 10 uF capacitor must be of 1210 case size, and it must be
ceramic for lowest ESR (Effective Series Resistance) possible. The 0.1
uF should be of case size 0402, this offers the lowest ESL (Effective
Series Inductance) to achieve low impedance towards the high speed
range.
For VDDD, at least ten 0.1 uF (0402 case size, ceramic) and one 10
uF (1210 case size, ceramic) capacitors are recommended. The 0.1 uF
capacitors should be placed as close to the VDDD pins as possible.
Please refer to evaluation board schematic for details.
IDT 82V3255
3.3V
0.1
μ
F
10
μ
F
DGND
AGND
GND_DIFF
1, 3, 15, 58
VDDA
VDDD
0.1
μ
F
3.3V
10
μ
F
21
7, 10, 11, 31, 40, 53
4, 14,57
VDD_DIFF
22
8, 9, 12, 32, 36, 38, 39, 45, 46 , 54
0.1
μ
F
0.1
μ
F
0.1
μ
F
0.1
μ
F
0.1
μ
F
0.1
μ
F
0.1
μ
F
0.1
μ
F
0.1
μ
F
0.1
μ
F
0.1
μ
F
0.1
μ
F
SLF7028T-100M1R1
SLF7028T-100M1R1
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