参数资料
| 型号： | IR3508ZMTRPBF |
| 厂商： | International Rectifier |
| 文件页数： | 12/19页 |
| 文件大小： | 0K |
| 描述： | IC CTRL XPHASE3 20MLPQ |
| 标准包装： | 1 |
| 系列： | * |
IR3508Z
A synchronous rectification disable comparator is used to detect the converter’s CSIN- pin voltage, which
represents local converter output voltage. If the voltage is below 75% of VDAC and negative current is detected,
GATEL is driven low, which disables synchronous rectification and eliminates negative current during power-up.
The gate drivers are pulled low if the supply voltage falls below the normal operating range. An 80k
resistor is
connected across the GATEH/GATEL and PGND pins to prevent the GATEH/GATEL voltage from rising due to
leakage or other causes under these conditions.
PWM Ramp
Every time the phase IC is powered up, the PWM ramp magnitude is calibrated to generate a 52.5 mV/% ramp
(VCC=12V). For example, a 15 % duty ratio will generate a ramp amplitude of 787.5 mV (15 x 52.5 mV) with 12V
supply applied to VCC. Feed-forward control is achieved by varying the PWM ramp proportionally with VCC
voltage after calibration.
Power State Indicator (PSI) function
From a system perspective, the PSI input is controlled by the system and is forced low when the load current is
lower than a preset limit and forced high when load current is higher than the preset limit. IR3508Z can accept an
active low signal on its PSI input and force the drivers into tri-state, effectively, forcing the phase IC into an off
state. A PSI-assert signal activates three features in the Phase IC. First, it disconnects the IOUT pin from the
ISHARE bus (from a system perspective). ISHARE is used to report current and is used for over-current
protection. By disconnecting the disabled phase from the ISHARE bus, proper current reporting and over-current
protection level are ensured. Secondly, the D Flip-Flop (DFF) is disabled, bypassing the Phase IC from the daisy
chain loop. By removing the DFF from the daisy chain, the system ensures that proper phase delay is activated
among the active phases. Finally, the gate drivers are forced to tri-state, disabling the phase IC from the power
stage. Figure 6 shows the impact of PSI-assert on the gate drivers. After an 8 cycle PHSIN delay followed by a
CLK falling edge, the PSI_SYNC goes from 0 to 1. This disables the gate drives and the DFF.
PSI
8 PHSIN Delay
CLK
PSI_SYNC
D_PWM LATCH
Figure 6: PSI assertion.
Debugging Mode
If the CSIN+ pin is pulled up to VCCL voltage, IR3508Z enters into debugging mode. Both drivers are pulled low
and IOUT output is disconnected from the current share bus, which isolates this phase IC from other phases.
However, the phase timing from PHSIN to PHSOUT does not change .
Page 12 of 19
Jan 09, 2009
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相关代理商/技术参数 |
参数描述 |
|---|---|
| IR3510 | 制造商:IRF 制造商全称:International Rectifier 功能描述:HOT-SWAP N+1 REDUNDANT XPHASETM CONTROL IC |
| IR3510MPBF | 功能描述:IC XPHASE CONTROL 32-MLPQ RoHS:是 类别:集成电路 (IC) >> PMIC - 电源管理 - 专用 系列:XPhase™ 应用说明:Ultrasound Imaging Systems Application Note 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:37 系列:- 应用:医疗用超声波成像，声纳 电流 - 电源:- 电源电压:2.37 V ~ 6 V 工作温度:0°C ~ 70°C 安装类型:表面贴装 封装/外壳:56-WFQFN 裸露焊盘 供应商设备封装:56-TQFN-EP（8x8） 包装:管件 |
| IR3510MTRPBF | 功能描述:热插拔功率分布 HOT-SWAP N+1 XPHASE CTRL IC RoHS:否 制造商:Texas Instruments 产品:Controllers & Switches 电流限制: 电源电压-最大:7 V 电源电压-最小:- 0.3 V 工作温度范围: 功率耗散: 安装风格:SMD/SMT 封装 / 箱体:MSOP-8 封装:Tube |
| IR3513MTRPBF | 功能描述:开关变换器、稳压器与控制器 2 CH OR 2 PHASE SYNC PWM CNTRLR RoHS:否 制造商:Texas Instruments 输出电压:1.2 V to 10 V 输出电流:300 mA 输出功率: 输入电压:3 V to 17 V 开关频率:1 MHz 工作温度范围: 安装风格:SMD/SMT 封装 / 箱体:WSON-8 封装:Reel |
| IR3513XMTRPBF | 功能描述:功率驱动器IC RoHS:否 制造商:Micrel 产品:MOSFET Gate Drivers 类型:Low Cost High or Low Side MOSFET Driver 上升时间: 下降时间: 电源电压-最大:30 V 电源电压-最小:2.75 V 电源电流: 最大功率耗散: 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:SOIC-8 封装:Tube |
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