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参数资料
| 型号： | IR3521MTRPBF |
| 厂商： | International Rectifier |
| 文件页数： | 11/45页 |
| 文件大小： | 0K |
| 描述： | IC CTRL XPHASE3 SVID 32-MLPQ |
| 标准包装： | 3,000 |
| 系列： | XPhase3™ |
| 应用： | 处理器 |
| 电流 - 电源： | 10mA |
| 电源电压： | 4.75 V ~ 7.5 V |
| 工作温度： | 0°C ~ 100°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 32-VFQFN 裸露焊盘 |
| 供应商设备封装： | 32-MLPQ（5x5） |
| 包装： | 带卷 (TR) |
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IR3521
SYSTEM THEORY OF OPERATION
PWM Control Method
The PWM block diagram of the xPHASE3 TM architecture is shown in Figure 4. Feed-forward voltage mode control
with trailing edge modulation is used to provide system control. A voltage type error amplifier with high-gain and
wide-bandwidth, located in the Control IC, is used for the voltage control loop. The feed-forward control is
performed by the phase ICs as a result of sensing the input voltage (FET’s drain voltage). The PWM ramp slope
will change with the input voltage and automatically compensate for changes in the input voltage. The input voltage
can change due to variations in the silver box output voltage or due to the wire and PCB-trace voltage drop related
to changes in load current.
IR35121CONTROL IC
GATE DRIVE
VOLTAGE
VIN
PHSOUT
IR3505 PHASE IC
VCC
CLOCK GENERATOR
CLKOUT
CLKIN
CLK Q
D
PWM
VCCH
PHSOUT
PHSIN
PHSIN
PWM
COMPARATOR
LATCH
S
RESET
DOMINANT
GATEH
SW
CBST
VOSNS1+
VOUT1
EAIN
-
+
R
VCCL
COUT
GND
REMOTE SENSE
ENABLE
GATEL
AMPLIFIER
VOUT1
VID6
RAMP
DISCHARGE
BODY
BRAKING
COMPARATOR
PGND
VOSNS1-
CLAMP
VDAC1
ERROR
LGND
SHARE ADJUST
ERROR AMPLIFIER
AMPLIFIER
VDAC
EAOUT1
RCP1
CCP13
CCP14
RFB12
RFB11
ISHARE
3K
-
VID6
VID6
+
VID6
VID6 +
+
CURRENT
SENSE
AMPLIFIER
CSIN+
CSIN-
CCS
RCS
FB1
CFB2
DACIN
IFB1
IROSC
VDRP1 AMP
VDRP1
CDRP2
RDRP1
PHSOUT
IR3505 PHASE IC
VCC
CLKIN
CLK Q
VCCH
Output 1 Only
IIN1
D
PWM
PHSIN
PWM
COMPARATOR
LATCH
S
RESET
DOMINANT
GATEH
SW
CBST
EAIN
-
+
ENABLE
VID6
RAMP
DISCHARGE
R
BODY
BRAKING
COMPARATOR
VCCL
GATEL
PGND
CLAMP
SHARE ADJUST
ERROR AMPLIFIER
CURRENT
ISHARE
3K
-
VID6
VID6
+
SENSE
AMPLIFIER
CSIN+
VID6
VID6 +
+
CSIN-
CCS
RCS
DACIN
Figure 4 - PWM Block Diagram
Frequency and Phase Timing Control
The oscillator (system clock) is located in the Control IC and is programmable from 250 kHz to 9 MHZ by an
external resistor. The control IC clock signal (CLKOUT) is connected to CLKIN of all the phase ICs. The phase
timing of the phase ICs is controlled by the daisy chain loop. The control IC phase clock output (PHSOUT) is
connected to the phase clock input (PHSIN) of the first phase IC, and PHSOUT of the first phase IC is connected to
PHSIN of the second phase IC, etc. The last phase IC (PHSOUT) is connected back to PHSIN of the control IC to
complete the loop. During power up, the control IC sends out clock signals from both CLKOUT and PHSOUT pins
and detects the feedback at PHSIN pin to determine the phase number and monitor any fault in the daisy chain
loop. Figure 5 shows the phase timing for a four phase converter.
Page 11
V3.03
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相关代理商/技术参数 |
参数描述 |
|---|---|
| IR3522 | 制造商:IRF 制造商全称:International Rectifier 功能描述:XPHASE3TM DDR & VTT CONTROL IC |
| IR3522MPBF | 制造商:IRF 制造商全称:International Rectifier 功能描述:XPHASE3TM DDR & VTT CONTROL IC |
| IR3522MTRPBF | 功能描述:开关变换器、稳压器与控制器 X-PHASE IR3522 AMD SVID CTRL IC RoHS:否 制造商:Texas Instruments 输出电压:1.2 V to 10 V 输出电流:300 mA 输出功率: 输入电压:3 V to 17 V 开关频率:1 MHz 工作温度范围: 安装风格:SMD/SMT 封装 / 箱体:WSON-8 封装:Reel |
| IR3523 | 制造商:IRF 制造商全称:International Rectifier 功能描述:XPHASE3TM DUAL OUTPUT CONTROL IC |
| IR3523MPBF | 制造商:IRF 制造商全称:International Rectifier 功能描述:XPHASE3TM DUAL OUTPUT CONTROL IC |
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