参数资料
型号: IR3521MTRPBF
厂商: International Rectifier
文件页数: 22/45页
文件大小: 0K
描述: IC CTRL XPHASE3 SVID 32-MLPQ
标准包装: 3,000
系列: XPhase3™
应用: 处理器
电流 - 电源: 10mA
电源电压: 4.75 V ~ 7.5 V
工作温度: 0°C ~ 100°C
安装类型: 表面贴装
封装/外壳: 32-VFQFN 裸露焊盘
供应商设备封装: 32-MLPQ(5x5)
包装: 带卷 (TR)
IR3521
Over-Current Hiccup Protection after Soft Start
The over current limit threshold is set by a resistor connected between OCSET X and VDAC X pins. Figure 13 shows
the hiccup over-current protection with delay after PGOOD is asserted. The delay is required since over-current
conditions can occur as part of normal operation due to load transients or VID transitions.
If the IIN X pin voltage, which is proportional to the average current plus VDAC X voltage, exceeds the OCSETx
voltage after PGOOD is asserted, it will initiate the discharge of the capacitor at SS/DEL X through the discharge
current 47uA. If the over-current condition persists long enough for the SS/DEL X capacitor to discharge below the
120mV offset of the delay comparator, the fault latch will be set which will then pull the error amplifier’s output low to
stop phase IC switching and will also de-asserting the PGOOD signal. The SS/DEL capacitor will then continue to
be discharged by a 4.5 uA current until it reaches 200 mV where the fault latch will reset to allow another soft start
cycle to occur. The output current is not controlled during the delay time. If an over-current condition is again
encountered during the soft start cycle, the over-current action will repeat and the converter will be in hiccup mode.
ENABLE
INTERNAL
OC DELAY
4.0V
3.92V
3.87V
SS/DEL
1.4V
EA
VOUT
PGOOD
OCP THRESHOLD
IOUT
START-UP WITH
OUTPUT SHORTED
HICCUP OVER-CURRENT
PROTECTION (OUTPUT
SHORTED)
NORMAL
START-UP
OCP
DELAY
OVER-CURRENT
PROTECTION
(OUTPUT SHORTED)
NORMAL NORMAL
START-UP OPERATION POWER-DOWN
NORMAL
(OUTPUT
OPERATION SHORTED)
Figure 13 Hiccup over-current waveforms
Linear Regulator Output (VCCL)
The IR3521 has a built-in linear regulator controller, and only an external NPN transistor is needed to create a
linear regulator. The output voltage of the linear regulator can be programmed between 4.75V and 7.5V [?] by the
resistor divider at VCCLFB pin. The regulator output powers the gate drivers and other circuits of the phase ICs
along with circuits in the control IC, and the voltage is usually programmed to optimize the converter efficiency. The
linear regulator can be compensated by a 4.7uF capacitor at the VCCL pin. As with any linear regulator, due to
stability reasons, there is an upper limit to the maximum value of capacitor that can be used at this pin and it’s a
function of the number of phases used in the multiphase architecture and their switching frequency. Figure 14
shows the stability plots for the linear regulator with 5 phases switching at 750 kHz.
For powering the IR3521 and up to two phase ICs an NPN transistor in a SOT-23 package could be used. For a
larger number of phase ICs an NPN transistor in DPAK package is recommended. .
VCCL voltage must be regulated by a closed control loop based on the IR3521’s VCCL regulator controller in order
to keep both VCCLDRV and VCCLFB voltages in the operating points that would support correct UVLO operation.
No external power rail can be connected to VCCL pin.”
Page 22
V3.03
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