参数资料
型号: IR3521MTRPBF
厂商: International Rectifier
文件页数: 4/45页
文件大小: 0K
描述: IC CTRL XPHASE3 SVID 32-MLPQ
标准包装: 3,000
系列: XPhase3™
应用: 处理器
电流 - 电源: 10mA
电源电压: 4.75 V ~ 7.5 V
工作温度: 0°C ~ 100°C
安装类型: 表面贴装
封装/外壳: 32-VFQFN 裸露焊盘
供应商设备封装: 32-MLPQ(5x5)
包装: 带卷 (TR)
IR3521
PIN#
20
21
22
23
24
25
26
27
28
29
30
31
32
EPAD
PIN
SYMBOL
SS/DEL1
IIN1
VDRP1
ROSC/OVP
PSI_L
CLKOUT
PHSOUT
PHSIN
VCCL
VCCLFB
VCCLDRV
PGOOD
SVC
LGND
PIN DESCRIPTION
Programs output 1 startup and over current protection delay timing. Connect an
external capacitor to LGND to program.
Output 1 average current input from the output 1 phase IC(s). This pin is also used
to communicate over voltage condition to phase ICs.
Output 1 Buffered IIN1 signal. Connect an external RC network to FB1 to program
converter output impedance.
Connect a resistor to LGND to program oscillator frequency and OCSET1, OCSET2,
FB1, FB2, VDAC1, and VDAC2 bias currents. Oscillator frequency equals switching
frequency per phase. The pin voltage is 0.6V during normal operation and higher
than 1.6V if over-voltage condition is detected.
Digital output to communicate the systems power state to phase ICs PSI_L pin.
Clock output at switching frequency multiplied by phase number. Connect to CLKIN
pins of phase ICs.
Phase clock output at switching frequency per phase. Connect to PHSIN pin of the
first phase IC.
Feedback input of phase clock. Connect to PHSOUT pin of the last phase IC.
Output of the voltage regulator, and power input for clock oscillator circuitry. Connect
a decoupling capacitor to LGND. No external power rail connection is allowed.
Non-inverting input of the voltage regulator error amplifier. Output voltage of the
regulator is programmed by the resistor divider connected to VCCL.
Output of the VCCL regulator error amplifier to control external transistor. The pin
senses 12V power supply through a resistor.
Open collector output that drives low during startup and under any external fault
condition. And it monitors output voltages, if any of the voltage planes fall out of
spec, it will drive low. Connect external pull-up. ( Output voltage out of spec is
defined as 350mV to 240mV below VDAC voltage )
SVC (Serial VID Clock) is an open drain output of the processor and input to
IR3521, requires an external bias voltage and should not be floated
Local ground for internal circuitry and IC substrate connection.
Page 4
V3.03
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