- 您现在的位置：买卖IC网 > PDF目录1809 > IR3529MTRPBF (International Rectifier)IC CTRL XPHASE CPU/ASIC 20-MLPQ PDF资料下载
参数资料
| 型号： | IR3529MTRPBF |
| 厂商： | International Rectifier |
| 文件页数： | 11/22页 |
| 文件大小： | 0K |
| 描述： | IC CTRL XPHASE CPU/ASIC 20-MLPQ |
| 标准包装： | 1 |
| 系列： | XPhase3™ |
| 应用： | 处理器 |
| 电流 - 电源： | 2mA |
| 电源电压： | 8 V ~ 16 V |
| 工作温度： | 0°C ~ 125°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 20-MLPQ |
| 供应商设备封装： | 20-MLPQ（4x4） |
| 包装： | 标准包装 |
| 其它名称： | IR3529MTRPBFDKR |
IR3529
Usually the resistor Rcs and capacitor Ccs are chosen so that the time constant of Rcs and Ccs equals the time
constant of the inductor which is the inductance L over the inductor DCR (R L ). If the two time constants match, the
voltage across Ccs is proportional to the current through L, and the sense circuit can be treated as if only a sense
resistor with the value of R L was used. The mismatch of the time constants does not affect the measurement of
inductor DC current, but affects the AC component of the inductor current.
v L
i L
Current
Sense Amp
L
R CS
R L
C CS
c
v CS
V O
C O
CSOUT
Figure 4: Inductor Current Sensing and Current Sense Amplifier
The advantage of sensing the inductor current versus high side or low side sensing is that actual output current being
delivered to the load is obtained rather than peak or sampled information about the switch currents. The output voltage
can be positioned to meet a load line based on real time information. Except for a sense resistor in series with the
inductor, this is the only sense method that can support a single cycle transient response. Other methods provide no
information during either load increase (low side sensing) or load decrease (high side sensing).
An additional problem associated with peak or valley current mode control for voltage positioning is that they suffer
from peak-to-average errors. These errors will show in many ways but one example is the effect of frequency variation.
If the frequency of a particular unit is 10% low, the peak to peak inductor current will be 10% larger and the output
impedance of the converter will drop by about 10%. Variations in inductance, current sense amplifier bandwidth, PWM
prop delay, any added slope compensation, input voltage, and output voltage are all additional sources of peak-to-
average errors.
Current Sense Amplifier
A high speed differential current sense amplifier is located in the phase IC, as shown in Figure 4. Its gain is nominally
32.5, and the 3850 ppm/oC increase in inductor DCR should be compensated in the voltage loop feedback path.
The current sense amplifier can accept positive differential input up to 50mV and negative up to -10mV before clipping.
The output of the current sense amplifier is summed with the DAC voltage and sent to the control IC and other phases
through an on-chip 3K
resistor connected to the ILL pin. The output of the current sense amplifier is summed with the
DAC voltage and sent to the phases through an on-chip 3K
resistor connected to the ISHARE pin. The ILL pins of all
the phases are tied together and the voltage on the share bus represents the average current through all the inductors
and is used by the control IC for voltage positioning. The ISHARE pins of all the phases are tied together and are not
connected to the control IC. The input offset of this amplifier is calibrated to +/- 1mV in order to reduce the current
sense error.
The input offset voltage is the primary source of error for the current share loop. In order to achieve very small input
offset error and superior current sharing performance, the current sense amplifier continuously calibrates itself. This
calibration algorithm creates ripple on IOUT bus with a frequency of f sw /896 in a multiphase architecture.
Average Current Share Loop
Current sharing between phases of the converter is achieved by the average current share loop in each phase IC. The
output of the current sense amplifier is compared with the average current at the share bus. If current in a phase is
smaller than the average current, the share adjust amplifier of the phase will pull down the starting point of the PWM
ramp thereby increasing its duty cycle and output current; if current in a phase is larger than the average current, the
Page 11 of 22
February 12, 2010
相关PDF资料 |
PDF描述 |
|---|---|
| IR3550MTRPBF | IC DRIVER GATE 60A PQFN |
| IR3553MTRPBF | IC DRIVER GATE 40A PQFN |
| IR3621FTR | IC REG CTRLR BUCK PWM VM 28TSSOP |
| IR3622AMPBF | IC REG CTRLR BUCK PWM VM 32MLPQ |
| IR3622MTRPBF | IC REG CTRLR BUCK PWM VM 32MLPQ |
相关代理商/技术参数 |
参数描述 |
|---|---|
| IR3531A | 制造商:IRF 制造商全称:International Rectifier 功能描述:41 Phase Dual Output Control IC Pre-bias compatible |
| IR3531A-MPBF | 制造商:IRF 制造商全称:International Rectifier 功能描述:41 Phase Dual Output Control IC Pre-bias compatible |
| IR3531AMTRPBF | 制造商:International Rectifier 功能描述:4+1 DUAL OUPUT CONTROLLER IC WITH I2C - Tape and Reel 制造商:International Rectifier 功能描述:IC OUTPUT CTRL 4+1 PHASE 48MLPQ 制造商:International Rectifier 功能描述:T&R / 4+1 Dual Ouput Controller IC with I2C |
| IR3531A-MTRPBF | 制造商:IRF 制造商全称:International Rectifier 功能描述:41 Phase Dual Output Control IC Pre-bias compatible |
| IR3531MTRPBF | 制造商:International Rectifier 功能描述:4+1 DUAL OUPUT CONTROLLER IC WITH I2C - Tape and Reel 制造商:International Rectifier 功能描述:IC OUTPUT CTRL 4+1 PHASE 48MLPQ 制造商:International Rectifier 功能描述:4 1 Dual Ouput Contr IC with I2C 制造商:International Rectifier 功能描述:T&R / 4+1 Dual Ouput Controller IC with I2C |
发布紧急采购，3分钟左右您将得到回复。