参数资料
型号: IRS21867SPBF
厂商: International Rectifier
文件页数: 14/21页
文件大小: 0K
描述: IC MOSFET DRIVER
标准包装: 95
系列: *
IRS21867S
Figure 11: D3 conducting
Figure 12: Q4 conducting
However, in a real inverter circuit, the V S voltage swing does not stop at the level of the negative DC bus, rather it
swings below the level of the negative DC bus. This undershoot voltage is called “negative V S transient”.
The circuit shown in Figure 13 depicts one leg of the three phase inverter; Figures 14 and 15 show a simplified
illustration of the commutation of the current between Q1 and D2. The parasitic inductances in the power circuit from
the die bonding to the PCB tracks are lumped together in L C and L E for each IGBT. When the high-side switch is on,
V S1 is below the DC+ voltage by the voltage drops associated with the power switch and the parasitic elements of the
circuit. When the high-side power switch turns off, the load current momentarily flows in the low-side freewheeling
diode due to the inductive load connected to V S1 (the load is not shown in these figures). This current flows from the
DC- bus (which is connected to the COM pin of the HVIC) to the load and a negative voltage between V S1 and the
DC- Bus is induced (i.e., the COM pin of the HVIC is at a higher potential than the V S pin).
Figure 13: Parasitic Elements
Figure 14: V S positive
Figure 15: V S negative
In a typical motor drive system, dV/dt is typically designed to be in the range of 3-5 V/ns. The negative V S transient
voltage can exceed this range during some events such as short circuit and over-current shutdown, when di/dt is
greater than in normal operation.
International Rectifier’s HVICs have been designed for the robustness required in many of today’s demanding
applications. An indication of the IRS21867’s robustness can be seen in Figure 16, where there is represented the
IRS2607 Safe Operating Area at V BS =15V based on repetitive negative V S spikes. A negative V S transient voltage
falling in the grey area (outside SOA) may lead to IC permanent damage; viceversa unwanted functional anomalies
or permanent damage to the IC do not appear if negative Vs transients fall inside SOA.
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14
? 2010 International Rectifier
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