参数资料
型号: IRS26302DJTRPBF
厂商: International Rectifier
文件页数: 22/53页
文件大小: 0K
描述: IC GATE DRIVER 3PH BRIDGE 44PLCC
标准包装: 1
配置: 3 相桥
输入类型: 非反相
延迟时间: 320ns
电流 - 峰: 200mA
配置数: 1
输出数: 3
高端电压 - 最大(自引导启动): 600V
电源电压: 10 V ~ 20 V
工作温度: -40°C ~ 125°C
安装类型: 表面贴装
封装/外壳: 44-PLCC(32 引线)
供应商设备封装: 44-PLCC,32 引线
包装: 标准包装
产品目录页面: 1382 (CN2011-ZH PDF)
其它名称: IRS26302DJTRPBFDKR
IRS26302DJ
Figure 11: Output enable/disable timing waveform
Fault Reporting and Programmable Fault Clear Timer
The IRS26302DJ provides an integrated fault reporting output and an adjustable fault clear timer. There are several
situations that would cause the HVIC to report a fault via the FAULT pin: an undervoltage condition of V CC or ITRIP,
Ground Fault (GF), PCFtrip pin recognizes an overcurrent.
Once the fault condition occurs, the FAULT pin is
internally pulled to V SS and the fault clear timer is activated. The fault output stays in the low state until the fault
condition has been removed and the fault clear timer expires; once the fault clear timer expires, the voltage on the
FAULT pin will return to V CC .
The length of the fault clear time period (t FLTCLR ) is determined by exponential charging characteristics of the capacitor
where the time constant is set by R RCIN and C RCIN . In Figure 12 where we see that a fault condition has occurred
(ITRIP), RCIN and FAULT are pulled to V SS , and once the fault has been removed, the fault clear timer begins.
Figure 13 shows that R RCIN is connected between the V CC and the RCIN pin, while C RCIN is placed between the RCIN
and V SS pins.
Figure 12: RCIN and FAULT pin waveforms
The design guidelines for this network are shown in Table 3.
C RCIN
Figure 13: Programming the fault clear timer
≤1 nF, ceramic
0.5 M
to 2 M
R RCIN
>> R ON,RCIN
Table 3: Design guidelines
www.irf.com
22
? 2009 International Rectifier
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