参数资料
型号: IRS26302DJTRPBF
厂商: International Rectifier
文件页数: 23/53页
文件大小: 0K
描述: IC GATE DRIVER 3PH BRIDGE 44PLCC
标准包装: 1
配置: 3 相桥
输入类型: 非反相
延迟时间: 320ns
电流 - 峰: 200mA
配置数: 1
输出数: 3
高端电压 - 最大(自引导启动): 600V
电源电压: 10 V ~ 20 V
工作温度: -40°C ~ 125°C
安装类型: 表面贴装
封装/外壳: 44-PLCC(32 引线)
供应商设备封装: 44-PLCC,32 引线
包装: 标准包装
产品目录页面: 1382 (CN2011-ZH PDF)
其它名称: IRS26302DJTRPBFDKR
IRS26302DJ
The length of the fault clear time period can be determined by using the formula below.
v C (t) = V f (1-e
-t/RC
)
t FLTCLR = -(R RCIN C RCIN )ln(1-V RCIN,TH /V CC )
Over-Current Protections
The IRS26302DJ HVICs are equipped with an ITRIP, GF and PFCtrip input pin. These functionality can be used to
detect over-current events in the DC- bus, in the DC+ bus, in the PFC section and Ground related. Once the HVIC
detects an over-current event, the outputs are shutdown, a fault is reported through the FAULT pin, and RCIN is
pulled to V SS .
The level of current at which the over-current protection is initiated is determined by the resistor network (i.e., R 0 , R 1 ,
and R 2 ) connected to ITRIP as shown in Figure 14, and the ITRIP threshold (V IT,TH+ ). The circuit designer will need to
determine the maximum allowable level of current in the DC- bus and select R 0 , R 1 , and R 2 such that the voltage at
node V X reaches the over-current threshold (V IT,TH+ ) at that current level.
V IT,TH+ = R 0 I DC- (R 1 /(R 1 +R 2 ))
Figure 14: Programming the over-current protection
For example, a typical value for resistor R 0 could be 50 m . The voltage of the ITRIP pin should not be allowed to
exceed 5 V; if necessary, an external voltage clamp may be used.
The shunt resistor or resistor network for GF or PCFtrip can be determined according to GF, PCFtrip threshold and
level of protection current. The GF pin should not be outside this range (VDC+0.3V, VDC-5V) and PCFtrip should not
be outside (Vcc+0.3V, Vss-5V); if necessary, an external voltage clamp may be used.
Over-Temperature Shutdown Protection
The ITRIP input of the IRS26302DJ can also be used to detect over-temperature events in the system and initiate a
shutdown of the HVIC (and power switches) at that time. In order to use this functionality, the circuit designer will
need to design the resistor network as shown in Figure 15 and select the maximum allowable temperature.
This network consists of a thermistor and two standard resistors R 3 and R 4 . As the temperature changes, the
resistance of the thermistor will change; this will result in a change of voltage at node V X . The resistor values should
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? 2009 International Rectifier
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