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参数资料
| 型号： | IS80C52CXXX-16:RD |
| 厂商： | ATMEL CORP |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 8-BIT, MROM, 16 MHz, MICROCONTROLLER, PQCC44 |
| 封装： | PLASTIC, LCC-44 |
| 文件页数： | 22/134页 |
| 文件大小： | 3805K |
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118
8011Q–AVR–02/2013
ATmega164P/324P/644P
The Timer/Counter Overflow Flag (TOVn) is set according to the mode of operation selected by
the WGMn3:0 bits. TOVn can be used for generating a CPU interrupt.
13.6
Input Capture Unit
The Timer/Counter incorporates an Input Capture unit that can capture external events and give
them a time-stamp indicating time of occurrence. The external signal indicating an event, or mul-
tiple events, can be applied via the ICPn pin or alternatively, via the analog-comparator unit. The
time-stamps can then be used to calculate frequency, duty-cycle, and other features of the sig-
nal applied. Alternatively the time-stamps can be used for creating a log of the events.
The Input Capture unit is illustrated by the block diagram shown in Figure 13-3. The elements of
the block diagram that are not directly a part of the Input Capture unit are gray shaded. The
small “n” in register and bit names indicates the Timer/Counter number.
Figure 13-3. Input Capture Unit Block Diagram
When a change of the logic level (an event) occurs on the Input Capture pin (ICPn), alternatively
on the Analog Comparator output (ACO), and this change confirms to the setting of the edge
detector, a capture will be triggered. When a capture is triggered, the 16-bit value of the counter
(TCNTn) is written to the Input Capture Register (ICRn). The Input Capture Flag (ICFn) is set at
the same system clock as the TCNTn value is copied into ICRn Register. If enabled (ICIEn = 1),
the Input Capture Flag generates an Input Capture interrupt. The ICFn Flag is automatically
cleared when the interrupt is executed. Alternatively the ICFn Flag can be cleared by software
by writing a logical one to its I/O bit location.
Reading the 16-bit value in the Input Capture Register (ICRn) is done by first reading the low
byte (ICRnL) and then the high byte (ICRnH). When the low byte is read the high byte is copied
into the high byte temporary register (TEMP). When the CPU reads the ICRnH I/O location it will
access the TEMP Register.
The ICRn Register can only be written when using a Waveform Generation mode that utilizes
the ICRn Register for defining the counter’s TOP value. In these cases the Waveform Genera-
ICFn (Int.Req.)
Analog
Comparator
WRITE
ICRn (16-bit Register)
ICRnH (8-bit)
Noise
Canceler
ICPn
Edge
Detector
TEMP (8-bit)
DATA BUS (8-bit)
ICRnL (8-bit)
TCNTn (16-bit Counter)
TCNTnH (8-bit)
TCNTnL (8-bit)
ACIC*
ICNC
ICES
ACO*
相关PDF资料 |
PDF描述 |
|---|---|
| IS80C52CXXX-16SHXXX:R | 8-BIT, MROM, 16 MHz, MICROCONTROLLER, PQCC44 |
| IS80C52CXXX-25:D | 8-BIT, MROM, 25 MHz, MICROCONTROLLER, PQCC44 |
| IS80C52CXXX-30SHXXX:RD | 8-BIT, MROM, 30 MHz, MICROCONTROLLER, PQCC44 |
| IS80C52CXXX-30SHXXX:R | 8-BIT, MROM, 30 MHz, MICROCONTROLLER, PQCC44 |
| IS80C52CXXX-L16:R | 8-BIT, MROM, 16 MHz, MICROCONTROLLER, PQCC44 |
相关代理商/技术参数 |
参数描述 |
|---|---|
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| IS80C86-2R2490 | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
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| IS80C88-2 | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
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