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参数资料
| 型号： | ISL6218EVAL2 |
| 厂商： | Intersil |
| 文件页数： | 10/19页 |
| 文件大小： | 0K |
| 描述： | EVALUATION BOARD 2 FOR ISL6218 |
| 标准包装： | 1 |
| 主要目的： | DC/DC，步降 |
| 输入电压： | 5.6 ~ 25V |
| 板类型： | 完全填充 |
| 已供物品： | 板 |
| 已用 IC / 零件： | ISL6218 |
ISL6218
TABLE 1. INTEL IMPV-IV VID CODES (Continued)
TABLE 1. INTEL IMPV-IV VID CODES (Continued)
VID5
0
0
0
0
VID4
1
1
1
1
VID3
0
0
0
0
VID2
1
1
1
1
VID1
0
0
1
1
VID0
0
1
0
1
VDAC
1.388
1.372
1.356
1.340
VID5
1
1
1
1
VID4
1
1
1
1
VID3
1
1
1
1
VID2
1
1
1
1
VID1
0
0
1
1
VID0
0
1
0
1
VDAC
0.748
0.732
0.716
0.700
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
1.324
1.308
1.292
1.276
1.260
1.244
1.228
1.212
1.196
1.180
1.164
1.148
1.132
1.116
1.100
1.084
1.068
1.052
1.036
1.020
Active, Deep Sleep and Deeper Sleep Modes
The ISL6218 Single-Phase Controller is designed to control
the CORE output voltage as per the IMVP-IV ? specifications
for Active, Deep Sleep, and Deeper Sleep Modes of
Operation.
After initial start-up, a logic high signal on DSEN and a logic
low signal on DRSEN signals the ISL6218 to operate in
Active mode (refer to Table 2). This mode will recognize VID
code changes and regulate the output voltage to these
command voltages.
A logic low signal present on STPCPU (pin DSEN), with a
logic low signal on DPRSLPVR (pin DRSEN) signals the
ISL6218 to reduce the CORE output voltage to the Deep
Sleep level, the voltage on the DSV pin.
A logic high on DPRSLPVR (pin DRSEN), with a logic low
signal on STPCPU (pin DSEN), signals the ISL6218
controller to further reduce the CORE output voltage to the
Deeper Sleep level, which is the voltage on the DRSV pin.
Deep Sleep and Deeper Sleep voltage levels are
TABLE 2. OUTPUT VOLTAGE AS A FUNCTION OF DSEN
AND DRSEN LOGIC STATES
1
1
1
1
1
1
0
0
0
0
1
1
1
1
1
1
0
0
1
1
1
1
0
0
0
0
1
1
0
0
0
1
0
1
0
1
1.004
0.988
0.972
0.956
0.940
0.924
DSEN -
STP_CPU
1
0
0
1
DRSEN -
DPRSLPVR
0
0
1
1
MODE OF
OPERATION
Active
Deep Sleep
Deeper Sleep
Deeper Sleep
OUTPUT
VOLTAGE
VID
DSV
DRSV
DRSV
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
1
1
1
1
0
0
1
1
1
1
0
0
0
0
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
0
1
0.908
0.892
0.876
0.860
0.844
0.828
0.812
0.796
0.780
0.764
10
FN9101.6
August 6, 2007
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|---|---|
| ISL6219 | 制造商:INTERSIL 制造商全称:Intersil Corporation 功能描述:Microprocessor CORE Voltage Regulator Precision Multi-Phase BUCK PWM Controller for Mobile Applications |
| ISL6219 WAF | 制造商:Harris Corporation 功能描述: |
| ISL6219A | 制造商:INTERSIL 制造商全称:Intersil Corporation 功能描述:Microprocessor CORE Voltage Regulator Precision Multi-Phase BUCK PWM Controller for Mobile Applications |
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