参数资料
型号: ISL6218EVAL2
厂商: Intersil
文件页数: 9/19页
文件大小: 0K
描述: EVALUATION BOARD 2 FOR ISL6218
标准包装: 1
主要目的: DC/DC,步降
输入电压: 5.6 ~ 25V
板类型: 完全填充
已供物品:
已用 IC / 零件: ISL6218
ISL6218
The choice of value for soft-start capacitor is determined by
the maximum slew rate required for the application. An
example calculation is shown in Equation 1. Using the I1
current source on the SOFT pin as 130μA, and the slew rate
of (10mV/ μ s), the SOFT capacitor is calculated in Equation 1:
ISL6218
C SOFT = SOURCE = 130 μA ?
I
SlewRate
1 μs
10 mV
≈ 0 . 012 μF
(EQ. 1)
ERROR
AMPLIFIER
Gate Drive Signals
The ISL6218 provides internal gate drive for a single
channel, Synchronous Buck, Core Regulator.
The ISL6218 was designed with a 4A, low side gate current
sink ability, and a 2A, low-side gate current source ability to
I DROOP
+
efficiently drive the latest, high performance MOSFETs. This
feature will provide the system designer with flexibility in
MOSFET selection as well as optimum efficiency during all
modes of operation.
SOFT
R DROOP
+ V DROOP
C SOFT
EA+
Frequency Setting
The power channel switching frequency is set up by a
resistor from the FSET pin to ground. The choice of FSET
resistance for a desired switching frequency can be
approximated using Figure 3. The switching frequency is
designed to operate between 250kHz and 500kHz per
phase.
CORE Voltage Programming
FIGURE 4. SOFT-START TRACKING CIRCUITRY SHOWING
INTERNAL CURRENT SOURCES AND “DROOP”
FOR ACTIVE, DEEP AND DEEPER SLEEP
MODES OF OPERATION
TABLE 1. INTEL IMPV-IV VID CODES
The voltage identification pins (VID0, VID1, VID2, VID3,
VID4 and VID5) set the DAC output voltage. These pins do
not have internal pull-up or pull-down capability. These pins
will recognize 1.0V, 3.3V or 5.0V CMOS logic. Table 1 shows
the command voltage, V DAC for the 6 bit VID codes.
The IC responds to VID code changes as shown in Figure 5.
PGOOD is masked between these transitions.
250
200
150
100
50
VID5
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
VID4
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
VID3
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
VID2
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
VID1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
VID0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
VDAC
1.708
1.692
1.676
1.660
1.644
1.628
1.612
1.596
1.580
1.564
1.548
1.532
1.516
1.500
1.484
0
250k
500k
750k
1M
0
0
1
1
1
1
1.468
CHANNEL SWITCHING FREQUENCY, f SW (Hz)
FIGURE 3. CHANNEL SWITCHING FREQUENCY vs R FSET
0
0
0
0
1
1
1
1
0
0
0
0
0
0
0
0
0
0
1
1
0
1
0
1
1.452
1.436
1.420
1.404
9
FN9101.6
August 6, 2007
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