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参数资料
| 型号： | ISL6218EVAL2 |
| 厂商： | Intersil |
| 文件页数： | 15/19页 |
| 文件大小： | 0K |
| 描述： | EVALUATION BOARD 2 FOR ISL6218 |
| 标准包装： | 1 |
| 主要目的： | DC/DC，步降 |
| 输入电压： | 5.6 ~ 25V |
| 板类型： | 完全填充 |
| 已供物品： | 板 |
| 已用 IC / 零件： | ISL6218 |
ISL6218
C2
R1
CDCPL
FB
R2
C1
COMP
VSEN
+
RISEN
VrDS(ON) -
V IN
PHASE
+
I L1
_
V DROOP
+
EA+
R DROOP
SOFT
ERROR
AMPLIFIER
-
-
+
V ERROR1
COMPARATOR
I DROOP
IMVP IV
REFERENCE
OVER-UNDER
VOLTAGE
PWM
CIRCUIT
UG1
LG1
Q2
Q1 L 01
-
V rDS(ON)
+
VCORE
COUT
RLOAD
C SOFT
I OCSET
OVER
CURRENT
I SEN ’
I SEN
CURRENT
SENSING
ISEN1
I SEN1
ISL6218
FIGURE 10. SIMPLIFIED BLOCK DIAGRAM OF THE ISL6218 VOLTAGE AND CURRENT CONTROL LOOPS FOR THE SINGLE CHANNEL
REGULATOR.
approximately ? of the I SEN , as shown in the “Block
SOFT pin through the Droop resistor and returns through the
EA+ pin. This creates a “Droop” voltage V DROOP , that
subtracts from the IMVP-IV ? reference voltage on SOFT to
generate the voltage setpoint for the CORE regulator.
VOUT, HI
VOUT, NOM
VOUT, LO
(0A, 1.506V)
(0A, 1.484V)
(0A, 1.462V)
(25A, 1.431V)
(25A, 1.409V)
Full load current for the Intel IMVP-IV ? Thin and Light
specification is 25A. Knowing that the Droop Current,
-3m
(25A, 1.387V)
sourced out of the SOFT pin will be ? of the I SEN , a “Droop”
resistor, R DROOP , can be selected to provide the amount of
LOAD LINE
I OUT, NL
IOUT, MID
IOUT, MAX
R DROOP = 2 . 3 ? ( Droop ) ?
R ISEN
r ( DSON )
voltage “Droop” required at full load. The selection of this
SELECTION OF R DROOP
Figure 11 shows a static “Droop” load line for the 1.484V
Active Mode. The ISL6218, as previously mentioned, allows
the programming of the load line slope by the selection of
the R DROOP resistor.
As per the Intel IMVP-IV ? and IMVP-IV+ ? specification,
Droop = 0.003 ( Ω ). Therefore, 25A of full load current
equates to a 0.075V Droop output voltage from the VID
setpoint. R DROOP can be selected based on R ISEN which is
calculated through Equation 3, r (DS(ON) and Droop, as per
the “Block Diagram” on page 7 or Equation 6:
( Ω )
(EQ. 6)
M
15
STATIC TOLERANCE BANDS
NOMINAL "DROOP" LOAD LINE
FIGURE 11. IMVP-IV ? ACTIVE MODE STATIC LOAD LINE
Component Selection Guidelines
Output Capacitor Selection
Output capacitors are required to filter the output inductor
current ripple, and supply the transient load current. The
filtering requirements are a function of the channel switching
frequency and the output ripple current. The load transient
requirements are a function of the slew rate (di/dt) and the
magnitude of the transient load current.
The microprocessor used for IMVP-IV ? will produce transient
load rates as high as 30A/ns. High frequency ceramic
capacitors are used to supply the initial transient current, and
slow the rate-of-change seen by the bulk capacitors. Bulk filter
capacitor values are generally determined by the ESR
(Effective Series Resistance) and voltage rating requirements,
rather than actual capacitance requirements. To meet the
stringent requirements of IMVP-IV ? , (15) 2.2μF, 0612 “Flip
Chip” high frequency, ceramic capacitors are placed very close
FN9101.6
August 6, 2007
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相关代理商/技术参数 |
参数描述 |
|---|---|
| ISL6219 | 制造商:INTERSIL 制造商全称:Intersil Corporation 功能描述:Microprocessor CORE Voltage Regulator Precision Multi-Phase BUCK PWM Controller for Mobile Applications |
| ISL6219 WAF | 制造商:Harris Corporation 功能描述: |
| ISL6219A | 制造商:INTERSIL 制造商全称:Intersil Corporation 功能描述:Microprocessor CORE Voltage Regulator Precision Multi-Phase BUCK PWM Controller for Mobile Applications |
| ISL6219A_07 | 制造商:INTERSIL 制造商全称:Intersil Corporation 功能描述:Microprocessor CORE Voltage Regulator Precision Multi-Phase BUCK PWM Controller for Mobile Applications |
| ISL6219ACA | 功能描述:IC REG CTRLR BUCK PWM VM 28-SSOP RoHS:否 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 切换控制器 系列:- 标准包装:4,000 系列:- PWM 型:电压模式 输出数:1 频率 - 最大:1.5MHz 占空比:66.7% 电源电压:4.75 V ~ 5.25 V 降压:是 升压:无 回扫:无 反相:无 倍增器:无 除法器:无 Cuk:无 隔离:无 工作温度:-40°C ~ 85°C 封装/外壳:40-VFQFN 裸露焊盘 包装:带卷 (TR) |
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