参数资料
| 型号： | ISL6263DHRZ-T |
| 厂商： | Intersil |
| 文件页数： | 8/17页 |
| 文件大小： | 0K |
| 描述： | IC VREG 3BIT 1PHASE 32-QFN |
| 标准包装： | 6,000 |
| 应用： | 转换器，GPU 内核电源 |
| 输入电压： | 5 V ~ 25 V |
| 输出数： | 1 |
| 输出电压： | 0.7 V ~ 1.09 V |
| 工作温度： | -10°C ~ 100°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 32-VFQFN 裸露焊盘 |
| 供应商设备封装： | 32-QFN（5x5） |
| 包装： | 带卷 (TR) |
ISL6263D
Functional Pin Descriptions
RBIAS (Pin 1) - Sets the internal 10μ A current reference.
Connect a 150k ? ±1% resistor from RBIAS to VSS.
SOFT (Pin 2) - Sets the output voltage slew-rate. Connect
an X5R or X7R ceramic capacitor from SOFT to VSS. The
SOFT pin is the non-inverting input of the error amplifier.
OCSET (Pin 3) - Sets the overcurrent threshold. Connect a
resistor from OCSET to VO.
VW (Pin 4) - Sets the static PWM switching frequency in
continuous conduction mode. Connect a resistor from VW to
COMP.
COMP (Pin 5) - Connects to the output of the control loop
error amplifier.
FB (Pin 6) - Connects to the inverting input of the control
loop error amplifier.
VDIFF (Pin 7) - Connects to the output of the VDIFF
differential amplifier. Together with FB pin, used for the
output voltage feedback.
VSEN (Pin 8) - This is the V OUT input of the GPU processor
Kelvin connection. Connects internally to the non-inverting
inputs of the VDIFF differential amplifier.
RTN (Pin 9) - This is the V GND input of the GPU processor
Kelvin connection. Connects internally to the inverting inputs
of the VDIFF differential amplifier.
ICOMP (Pin 10) - Connects to the output of the differential
current sense amplifier and to the non-inverting inputs of the
overcurrent comparator. Used for output current monitor and
overcurrent protection.
ISN (Pin 11) - This is the feedback of the current sense
amplifier. Connects internally to the inverting input of the
current sense amplifier. Used for output current sense.
VO (Pin 12) - Connects to the inverting inputs of the VDIFF
differential amplifier. Measures the output voltage V OUT .
ISP (Pin 13) - Connects to the non-inverting input of the
current sense amplifier. Used for output current sense.
VIN (Pin 14) - Connects to the R 3 PWM modulator providing
input voltage feed-forward. For optimum input voltage
transient response, connect near the drain of the high-side
MOSFETs.
VSS (Pin 15) - Analog ground.
VDD (Pin 16) - Input power supply for the IC. Connect to
+5VDC and decouple with at least a 1μF MLCC capacitor
from the VDD pin to the VSS pin.
BOOT (Pin 17) - Input power supply for the high-side
MOSFET gate driver. Connect an MLCC bootstrap capacitor
from the BOOT pin to the PHASE pin.
8
UGATE (Pin 18) - High-side MOSFET gate driver output.
Connect to the gate of the high-side MOSFET.
PHASE (Pin 19) - Current return path for the UGATE
high-side MOSFET gate driver. Detects the polarity of the
PHASE node voltage for diode emulation. Connect the
PHASE pin to the drains of the low-side MOSFETs.
PGND (Pin 20) - Current return path for the LGATE low-side
MOSFET gate driver. The PGND pin only conducts current
when LGATE pulls down. Connect the PGND pin to the
sources of the low-side MOSFETs.
LGATE (Pin 21) - Low-side MOSFET gate driver output.
Connect to the gate of the low-side MOSFET.
PVCC (Pin 22) - Input power supply for the low-side
MOSFET gate driver, and the high-side MOSFET gate
driver, via the internal bootstrap diode connected between
the PVCC and BOOT pins. Connect to +5VDC and decouple
with at least 1μF of an MLCC capacitor from the PVCC pin to
the PGND pin.
OFFSET0 (Pin 23) - A logic high signal will incrementally
provide 12.5mV offset for the DAC output voltage. OFFSET0
pin should not be floated.
OFFSET1 (Pin 24) - A logic high signal will incrementally
provide 25mV offset for the DAC output voltage. OFFSET1
pin should not be floated.
VID0:VID2 (Pin 25:Pin 27) - Voltage identification inputs.
VID0 input is the least significant bit (LSB) and VID2 input is
the most significant bit (MSB).
IMON (Pin 28) - A voltage signal proportional to the output
current of the converter.
VR_ON (Pin 29) - A high logic signal on this pin enables the
converter and a low logic signal disables the converter.
AF_EN (Pin 30) - Together with FDE pin, used to program
the diode-emulation and audio filter behavior.
PGOOD (Pin 31) - The PGOOD pin is an open-drain output
that indicates when the converter is able to supply regulated
voltage. Connect the PGOOD pin to a maximum of 5V
through a pull-up resistor.
FDE (Pin 32) - Together with AF_EN pin, the FDE pin is
used to program the diode-emulation and audio filter
behavior.
BOTTOM - Connects to substrate. Electrically isolated but
should be connected to VSS. Requires best practical
thermal coupling to PCB.
FN6753.1
July 8, 2010
相关PDF资料 |
PDF描述 |
|---|---|
| AS1360-21-T | IC REG LDO 2.1V 115MA SOT23-3 |
| RBM31DCAT | CONN EDGECARD 62POS R/A .156 SLD |
| RMC25DRYN-S93 | CONN EDGECARD 50POS DIP .100 SLD |
| RSA15DTMT | CONN EDGECARD 30POS R/A .125 SLD |
| RSC25DRYH-S93 | CONN EDGECARD 50POS DIP .100 SLD |
相关代理商/技术参数 |
参数描述 |
|---|---|
| ISL6263EVAL1 | 制造商:Intersil Corporation 功能描述:ISL6263 EVALUATION BOARD 1 - IMVP LICENSE REQUIRED - Bulk |
| ISL6264 | 制造商:INTERSIL 制造商全称:Intersil Corporation 功能描述:Two-Phase Core Controller for AMD Mobile Turion CPUs |
| ISL6264CRZ | 功能描述:IC CORE CTRLR TWO-PHASE 40-QFN RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - 专用型 系列:- 标准包装:43 系列:- 应用:控制器，Intel VR11 输入电压:5 V ~ 12 V 输出数:1 输出电压:0.5 V ~ 1.6 V 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:48-VFQFN 裸露焊盘 供应商设备封装:48-QFN（7x7） 包装:管件 |
| ISL6264CRZ-T | 功能描述:IC CORE CTRLR TWO-PHASE 40-QFN RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - 专用型 系列:- 标准包装:43 系列:- 应用:控制器，Intel VR11 输入电压:5 V ~ 12 V 输出数:1 输出电压:0.5 V ~ 1.6 V 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:48-VFQFN 裸露焊盘 供应商设备封装:48-QFN（7x7） 包装:管件 |
| ISL6265 | 制造商:INTERSIL 制造商全称:Intersil Corporation 功能描述:Multi-Output Controller with Integrated MOSFET Drivers for AMD SVI Capable |
发布紧急采购，3分钟左右您将得到回复。