参数资料
型号: ISL6264CRZ
厂商: Intersil
文件页数: 4/23页
文件大小: 0K
描述: IC CORE CTRLR TWO-PHASE 40-QFN
标准包装: 50
应用: 控制器,AMD 移动式 Turion?
输入电压: 5 V ~ 24 V
输出数: 1
输出电压: 0.38 V ~ 1.55 V
工作温度: -10°C ~ 100°C
安装类型: 表面贴装
封装/外壳: 40-VFQFN 裸露焊盘
供应商设备封装: 40-QFN(6x6)
包装: 管件
ISL6264
Electrical Specifications
VDD = 5V, T A = -10°C to +100°C, unless otherwise specified. Parameters with MIN and/or MAX limits are 100%
tested at +25°C, unless otherwise specified. Temperature limits established by characterization and are not
production tested. (Continued)
SYMBOL
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNITS
OFFSET FUNCTION
I OFFSET
I FB
OFS Pin Current
FB Pin Souring Current
36.5k Ω resistor connects OFS pin to GND.
-
-
33
33
-
-
μA
μA
LOGIC INPUTS
V IL(3.3V)
V IH(3.3V)
VR_ON
VR_ON
-
2.3
-
-
1
-
V
V
I IL(3.3V)
Leakage current of VR_ON
Logic input is low
-1
0
-
μA
I IL(3.3V)
V IL(3.3V)
V IH(3.3V)
SET
SET
Logic input is high at 3.3V
-
-
2.3
0
-
-
1
1
-
μA
V
V
I IL(3.3V)
Leakage Current of SET
Logic input is low
-1
0
-
μA
I IL(3.3V)
V IL(1.0V)
V IH(1.0V)
DAC(VID0 - VID5) and PSI_L Input Low
DAC(VID0 - VID5), PSI_L input High
Logic input is high at 3.3V
-
-
0.7
0.45
-
-
1
0.3
-
μA
V
V
I IL(1V)
Leakage Current of DAC
(VID0 - VID5) and PSI_L
Logic input is low
Logic input is high at 1V
-1
-
0
0.45
-
1
μA
μA
NOTES:
3. Limits should be considered typical and are not production tested.
4. Limits established by characterization and are not production tested.
ISL6264 Gate Driver Timing Diagram
PWM
t PDHU
t t RU
t FU
1V
UGATE
LGATE
1V
t FL
4
t PDHL
t RL
FN6359.3
May 28, 2009
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