参数资料
| 型号： | ISL62875HRUZ-T |
| 厂商： | Intersil |
| 文件页数： | 13/22页 |
| 文件大小： | 0K |
| 描述： | IC REG CTRLR BUCK PWM 20UTQFN |
| 标准包装： | 3,000 |
| 系列： | Robust Ripple Regulator™ (R³) |
| PWM 型： | 控制器 |
| 输出数： | 1 |
| 频率 - 最大： | 550kHz |
| 电源电压： | 4.75 V ~ 5.25 V |
| 降压： | 是 |
| 升压： | 无 |
| 回扫： | 无 |
| 反相： | 无 |
| 倍增器： | 无 |
| 除法器： | 无 |
| Cuk： | 无 |
| 隔离： | 无 |
| 工作温度： | -10°C ~ 100°C |
| 封装/外壳： | 20-UFQFN |
| 包装： | 带卷 (TR) |
ISL62875
V SET ( x ) ? R
(EQ. 5)
R OFS = --------------------------------------------
Setpoint Reference Voltage
Programming
Voltage identification (VID) pins select user-programmed
setpoint reference voltages that appear at the SREF pin.
The converter is in regulation when the FB pin voltage
(V FB ) equals the SREF pin voltage (V SREF .) The IC
measures V FB and V SREF relative to the GND pin, not the
PGND pin. The setpoint reference voltages use the
naming convention V SET(x) where (x) is the first, second,
third, or fourth setpoint reference voltage where:
- V SET1 < V SET2 < V SET3 < V SET4
- V OUT1 < V OUT2 < V OUT3 < V OUT4
The V SET1 setpoint is fixed at 500mV because it
corresponds to the closure of internal switch SW0 that
configures the V SET amplifier as a unity-gain voltage
follower for the 500mV voltage reference V REF .
A feedback voltage-divider network may be required to
achieve the desired reference voltages. Using the
feedback voltage-divider allows the maximum output
voltage of the converter to be higher than the 1.5V
maximum setpoint reference voltage that can be
the attenuation factor K in all the calculations for
selecting the R SET programming resistors.
The value of offset resistor R OFS can be calculated only
after the value of loop-compensation resistor R FB has
been determined. The calculation of R OFS is written as
Equation 5:
FB
V OUT – V SET ( x )
The setpoint reference voltages are programmed with
resistors that use the naming convention R SET(x) where
(x) is the first, second, third, or fourth programming
resistor connected in series starting at the SREF pin and
ending at the GND pin. When one of the internal switches
closes, it connects the inverting input of the V SET
amplifier to a specific node among the string of R SET
programming resistors. All the resistors between that
node and the SREF pin serve as the feedback impedance
R F of the V SET amplifier. Likewise, all the resistors
between that node and the GND pin serve as the input
impedance R IN of the V SET amplifier. Equation 6 gives
the general form of the gain equation for the V SET
amplifier:
V SET ( X ) = V REF ? ? 1 + ---------- ?
programmed on the SREF pin. Likewise, the feedback
voltage-divider allows the minimum output voltage of the
converter to be higher than the fixed 500mV setpoint
? R F ?
? R IN ?
(EQ. 6)
reference voltage of V SET1 . Scale the voltage-divider
network such that the voltage V FB equals the voltage
V SREF when the converter output voltage is at the
desired level. The voltage-divider relation is given in
Equation 3:
Where:
- V REF is the 500mV internal reference of the IC
- V SET(x) is the resulting setpoint reference voltage
that appears at the SREF pin
V FB = V OUT ? ----------------------------------
R + R
Where:
R OFS
FB OFS
(EQ. 3)
Calculating Setpoint Voltage Programming
Resistor Values
TABLE 2. ISL62875 VID TRUTH TABLE
- V FB = V SREF
VID STATE
RESULT
- R FB is the loop-compensation feedback resistor
that connects from the FB pin to the converter
output
- R OFS is the voltage-scaling programming resistor
that connects from the FB pin to the GND pin
The attenuation of the feedback voltage divider is written
as:
VID1
1
1
0
0
VID0
1
0
1
0
CLOSE
SW0
SW1
SW2
SW3
V SREF
V SET1
V SET2
V SET3
V SET4
V OUT
V OUT1
V OUT2
V OUT3
V OUT4
V SREF ( lim ) R OFS
K = ------------------------------- = ----------------------------------
V OUT ( lim ) R FB + R OFS
Where:
- K is the attenuation factor
(EQ. 4)
First, determine the attenuation factor K . Next, assign an
initial value to R SET4 of approximately 100k Ω then
calculate R SET1 , R SET2 , and R SET3 using Equations 7, 8,
and 9 respectively. The equation for the value of R SET1 is
written as Equation 7:
V REF ? K V SET2
K V SET2 ? K V SET3
- V SREF( lim ) is the V SREF voltage setpoint of either
500mV or 1.50V
- V OUT( lim ) is the output voltage of the converter
when V SREF = V SREF( lim )
Since the voltage-divider network is in the feedback
path, all output voltage setpoints will be attenuated by K ,
so it follows that all of the setpoint reference voltages will
be attenuated by K . It will be necessary then to include
R SET4 ? K V SET4 ? ( K V SET2 – V REF )
R SET1 = ----------------------------------------------------------------------------------------------------
The equation for the value of R SET2 is written as
Equation 8:
R SET4 ? K V SET4 ? ( K V SET3 – K V SET2 )
R SET2 = -----------------------------------------------------------------------------------------------------------
(EQ. 7)
(EQ. 8)
13
September 18, 2009
FN6905.1
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