参数资料
| 型号： | ISL62875HRUZ-T |
| 厂商： | Intersil |
| 文件页数： | 17/22页 |
| 文件大小： | 0K |
| 描述： | IC REG CTRLR BUCK PWM 20UTQFN |
| 标准包装： | 3,000 |
| 系列： | Robust Ripple Regulator™ (R³) |
| PWM 型： | 控制器 |
| 输出数： | 1 |
| 频率 - 最大： | 550kHz |
| 电源电压： | 4.75 V ~ 5.25 V |
| 降压： | 是 |
| 升压： | 无 |
| 回扫： | 无 |
| 反相： | 无 |
| 倍增器： | 无 |
| 除法器： | 无 |
| Cuk： | 无 |
| 隔离： | 无 |
| 工作温度： | -10°C ~ 100°C |
| 封装/外壳： | 20-UFQFN |
| 包装： | 带卷 (TR) |
ISL62875
(EQ. 28)
P COPPER = I LOAD ? DCR
V O
V IN ? EFF
A typical step-down DC/DC converter will have an I P-P of
20% to 40% of the maximum DC output load current.
The value of I P-P is selected based upon several criteria,
such as MOSFET switching loss, inductor core loss, and
the resistive loss of the inductor winding. The DC copper
loss of the inductor can be estimated using Equation 28:
2
Where, I LOAD is the converter output DC current.
The copper loss can be significant so attention has to be
given to the DCR selection. Another factor to consider
when choosing the inductor is its saturation
characteristics at elevated temperature. A saturated
inductor could cause destruction of circuit components,
as well as nuisance OCP faults.
A DC/DC buck regulator must have output capacitance
- I MAX is the maximum continuous I LOAD of the
converter
- x is a multiplier (0 to 1) corresponding to the
inductor peak-to-peak ripple amplitude expressed
as a percentage of I MAX (0% to 100%)
- D is the duty cycle that is adjusted to take into
account the efficiency of the converter
Duty cycle is written as Equation 32:
D = -------------------------- (EQ. 32)
In addition to the bulk capacitance, some low ESL
ceramic capacitance is recommended to decouple
between the drain of the high-side MOSFET and the
source of the low-side MOSFET.
0.60
Δ V ESR = I P-P ? E SR
C O into which ripple current I P-P can flow. Current I P-P
develops a corresponding ripple voltage V P-P across C O,
which is the sum of the voltage drop across the capacitor
ESR and of the voltage change stemming from charge
moved in and out of the capacitor. These two voltages
are expressed in Equations 29 and 30:
(EQ. 29)
0.55
0.50
0.45
0.40
0.35
0.30
0.25
x = 0.25
x=1
x = 0.75
x = 0.50
Δ Δ V C = ---------------------------------
I P-P
8 ? C O ? F SW
(EQ. 30)
0.20
0.15
0.10
x=0
If the output of the converter has to support a load with
high pulsating current, several capacitors will need to be
paralleled to reduce the total ESR until the required V P-P
is achieved. The inductance of the capacitor can cause a
0.05
0
0
0.1
0.2
0.3
0.4 0.5 0.6
DUTY CYCLE
0.7
0.8
0.9
1.0
C BOOT ≥ ------------------------
Q GATE
Δ V BOOT
( I MAX ? ( D – D ) ) + ? x ? I MAX ? ------ ?
12 ?
brief voltage dip if the load transient has an extremely
high slew rate. Low inductance capacitors should be
considered. A capacitor dissipates heat as a function of
RMS current and frequency. Be sure that I P-P is shared
by a sufficient quantity of paralleled capacitors so that
they operate below the maximum rated RMS current at
F SW . Take into account that the rated value of a
capacitor can fade as much as 50% as the DC voltage
across it increases.
Selection of the Input Capacitor
The important parameters for the bulk input capacitance
are the voltage rating and the RMS current rating. For
reliable operation, select bulk capacitors with voltage and
current ratings above the maximum input voltage and
capable of supplying the RMS current required by the
switching circuit. Their voltage rating should be at least
1.25x greater than the maximum input voltage, while a
voltage rating of 1.5x is a preferred rating. Figure 10 is a
graph of the input RMS ripple current, normalized
relative to output load current, as a function of duty
cycle that is adjusted for converter efficiency. The ripple
current calculation is written as Equation 31:
2 2 2 D
? (EQ. 31)
I IN_RMS = -----------------------------------------------------------------------------------------------------
I MAX
Where:
17
FIGURE 10. NORMALIZED RMS INPUT CURRENT FOR
x = 0.8
Selecting The Bootstrap Capacitor
Adding an external capacitor across the BOOT and
PHASE pins completes the bootstrap circuit. We selected
the bootstrap capacitor breakdown voltage to be at
least 10V. Although the theoretical maximum voltage of
the capacitor is PVCC-V DIODE (voltage drop across the
boot diode), large excursions below ground by the
phase node requires we select a capacitor with at least
a breakdown rating of 10V. The bootstrap capacitor can
be chosen from Equation 33:
(EQ. 33)
Where:
- Q GATE is the amount of gate charge required to
fully charge the gate of the upper MOSFET
- Δ V BOOT is the maximum decay across the BOOT
capacitor
As an example, suppose an upper MOSFET has a gate
charge, Q GATE , of 25nC at 5V and also assume the droop
in the drive voltage over a PWM cycle is 200mV. One will
find that a bootstrap capacitance of at least 0.125μF is
required. The next larger standard value capacitance is
September 18, 2009
FN6905.1
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| ISL62881BHRTZ | 功能描述:直流/直流开关调节器 1 PHS CNTRLR W/INTEG DRVR 32LD 5X5 RoHS:否 制造商:International Rectifier 最大输入电压:21 V 开关频率:1.5 MHz 输出电压:0.5 V to 0.86 V 输出电流:4 A 输出端数量: 最大工作温度: 安装风格:SMD/SMT 封装 / 箱体:PQFN 4 x 5 |
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