参数资料
| 型号： | ISL62875HRUZ-T |
| 厂商： | Intersil |
| 文件页数： | 15/22页 |
| 文件大小： | 0K |
| 描述： | IC REG CTRLR BUCK PWM 20UTQFN |
| 标准包装： | 3,000 |
| 系列： | Robust Ripple Regulator™ (R³) |
| PWM 型： | 控制器 |
| 输出数： | 1 |
| 频率 - 最大： | 550kHz |
| 电源电压： | 4.75 V ~ 5.25 V |
| 降压： | 是 |
| 升压： | 无 |
| 回扫： | 无 |
| 反相： | 无 |
| 倍增器： | 无 |
| 除法器： | 无 |
| Cuk： | 无 |
| 隔离： | 无 |
| 工作温度： | -10°C ~ 100°C |
| 封装/外壳： | 20-UFQFN |
| 包装： | 带卷 (TR) |
ISL62875
( V NEW – V OLD )
t VS = – ( R T ? C SOFT ) ? LN ( 1 – ------------------------------------------- )
G COMP ( s ) = ---------------------------------------------------------------------------------------------------------------
s ? R FB ? C INT ? ( 1 + s ? R COMP ? C
)
R COMP
reference setpoint. The SSOK flag is set, the PGOOD pin
goes high, and the I SS current source changes over to
the voltage-step current source I VS which has a current
limit of ±100μA. Whenever the VID inputs or the
external setpoint reference, programs a different setpoint
reference voltage, the I VS current source charges or
discharges capacitor C SOFT to that new level at ±100μA.
Once C SOFT charges to the selected setpoint voltage, the
I VS current source comes out of the 100μA current limit
and decays to the static value set by V SREF ÷ R T . The
elapsed time to charge C SOFT to the new voltage is
called the voltage-step delay t VS and is given by
Equation 17:
(EQ. 17)
I VS ? R T
Where:
Compensation Design
Figure 8 shows the recommended Type-II compensation
circuit. The FB pin is the inverting input of the error
amplifier. The COMP signal, the output of the error
amplifier, is inside the chip and unavailable to users.
C INT is a 100pF capacitor integrated inside the IC,
connecting across the FB pin and the COMP signal. R FB ,
R COMP , C COMP and C INT form the Type-II compensator.
The frequency domain transfer function is given by
Equation 20:
1 + s ? ( R FB + R COMP ) ? C COMP
(EQ. 20)
COMP
C INT = 100pF C COMP
- I VS is the ±100μA setpoint voltage-step current
- V NEW is the new setpoint voltage selected by the
VID inputs
- V OLD is the setpoint voltage that V NEW is changing
from
- R T is the sum of the R SET programming resistors
COMP
-
EA
+
FB
R OFS
R FB
V OUT
– t SS
C SOFT = ---------------------------------------------------------------------
I SS ? R T
? R T ? LN ( 1 – ------------------------------ ) ?
– t VS
C SOFT = ------------------------------------------------------------------------------
? R T ? LN ( 1 – --------------------------------------- ) ?
V O
I L
_
C SEN
C O
+ V ROCSET
Component Selection For C SOFT Capacitor
Choosing the C SOFT capacitor to meet the requirements
of a particular soft-start delay t SS is calculated with
Equation 18, which is written as:
(EQ. 18)
? V START-UP ?
? ?
Where:
- t SS is the soft-start delay
- I SS is the soft-start current source at the 20μA
limit
- V START-UP is the setpoint reference voltage
selected by the state of the VID inputs at the time
EN is asserted
- R T is the sum of the R SET programming resistors
Choosing the C SOFT capacitor to meet the requirements
of a particular voltage-step delay t VS is calculated with
Equation 19, which is written as:
(EQ. 19)
? V NEW – V OLD ?
? ± I VS ? R T ?
Where:
- t VS is the voltage-step delay
- V NEW is the new setpoint voltage
- V OLD is the setpoint voltage that V NEW is changing
from
- I VS is the ±100μA setpoint voltage-step current;
positive when V NEW > V OLD , negative when V NEW
< V OLD
- R T is the sum of the R SET programming resistors
15
SREF
FIGURE 8. COMPENSATION REFERENCE CIRCUIT
The LC output filter has a double pole at its resonant
frequency that causes rapid phase change. The R 3
modulator used in the IC makes the LC output filter
resemble a first order system in which the closed loop
stability can be achieved with the recommended Type-II
compensation network. Intersil provides a PC-based tool
that can be used to calculate compensation network
component values and help simulate the loop frequency
response.
Fault Protection
Overcurrent
The overcurrent protection (OCP) setpoint is
programmed with resistor R OCSET which is connected
across the OCSET and PHASE pins. Resistor R O is
connected between the VO pin and the actual output
voltage of the converter. During normal operation, the
VO pin is a high impedance path, therefore there is no
voltage drop across R O . The value of resistor R O should
always match the value of resistor R OCSET .
L
DCR
PHASE
+ V DCR
R OCSET
10μA _
OCSET
R O
VO
FIGURE 9. OVERCURRENT PROGRAMMING CIRCUIT
September 18, 2009
FN6905.1
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