参数资料
| 型号： | ISL6314IRZ-T |
| 厂商： | Intersil |
| 文件页数： | 11/32页 |
| 文件大小： | 0K |
| 描述： | IC CTRLR PWM 1PHASE BUCK 32-QFN |
| 产品培训模块： | Solutions for Industrial Control Applications |
| 标准包装： | 6,000 |
| 应用： | 控制器，Intel VR11，AMD CPU |
| 输入电压： | 5 V ~ 12 V |
| 输出数： | 1 |
| 输出电压： | 0.38 V ~ 1.6 V |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 32-VFQFN 裸露焊盘 |
| 供应商设备封装： | 32-QFN 裸露焊盘（5x5） |
| 包装： | 带卷 (TR) |
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ISL6314
The PWM output state is driven by the position of the error
EXTERNAL CIRCUIT
APA
ISL6314 INTERNAL CIRCUIT
amplifier output signal, V COMP , as illustrated in Figure 3. At
the beginning of each PWM time interval, this V COMP signal
is compared to the internal modulator waveform. As long as
the V COMP voltage is lower then the modulator waveform
C APA
R APA
V APA,TRIP
100μA
+
APA
voltage, the PWM signal is commanded low. The internal
MOSFET driver detects the low state of the PWM signal and
-
TO APA
turns off the upper MOSFET and turns on the lower
COMP
LOW
PASS
FILTER
CIRCUITRY
synchronous MOSFET. When the V COMP voltage crosses
the modulator ramp, the PWM output transitions high,
turning off the synchronous MOSFET and turning on the
ERROR
AMPLIFIER
FIGURE 2. ADAPTIVE PHASE ALIGNMENT DETECTION
As Figure 2 shows, the APA circuitry works by monitoring the
voltage on the APA pin and comparing it to a filtered copy of
the voltage on the COMP pin. The voltage on the APA pin is
a copy of the COMP pin voltage that has been negatively
upper MOSFET. The PWM signal will remain high until the
V COMP voltage crosses the modulator ramp again. When
this occurs, the PWM signal will transition low again.
During each PWM time interval, the PWM signal can only
transition high once. Once PWM transitions high, it can not
transition high again until the beginning of the next PWM
time interval. This prevents the occurrence of double PWM
pulses occurring during a single period.
offset. If the APA pin exceeds the filtered COMP pin voltage
an APA event occurs and the channel is forced on.
V COMP
MODULATOR
RAMP
+
-
PWM
TO GATE
CONTROL
LOGIC
The APA trip level is the amount of DC offset between the
COMP pin and the APA pin. This is the voltage excursion
that the APA and COMP pin must have during a transient
event to activate the Adaptive Phase Alignment circuitry.
This APA trip level is set through a resistor, R APA , that
connects from the APA pin to the COMP pin. A 100μA
current flows across R APA into the APA pin to set the APA
trip level as described in Equation 3. An APA trip level of
500mV is recommended for most applications. A 1000pF
capacitor, C APA , should also be placed across the R APA
resistor to help with noise immunity.
WAVEFORM
FIGURE 3. CHANNEL PWM FUNCTION
Output Voltage Setting
The ISL6314 uses a digital to analog converter (DAC) to
generate a reference voltage based on the logic signals at
the VID pins. The DAC decodes the logic signals into one of
the discrete voltages shown in Tables 2, 3 or 4. In the Intel
VR11 mode of operation, each VID pin is pulled up to an
internal 1.2V voltage by a weak current source (40μA),
V APA , TRIP = R APA ? 100 × 10
– 6
(EQ. 3)
which decreases to 0A as the voltage at the VID pin varies
from 0 to the internal 1.2V pull-up voltage. In AMD modes of
operation, the VID pins are pulled low by a weak 20μA
The ISL6314 accommodates three different DAC ranges:
Active Pulse Positioning (APP) Modulated PWM
Operation
The ISL6314 uses a proprietary Active Pulse Positioning
(APP) modulation scheme to control the internal PWM
signals that command each channel’s driver to turn their
upper and lower MOSFETs on and off. The time interval in
which a PWM signal can occur is generated by an internal
clock, whose cycle time is the inverse of the switching
frequency set by the resistor connected to the FS pin. The
advantage of Intersil’s proprietary Active Pulse Positioning
(APP) modulator is that the PWM signal has the ability to
turn on at any point during this PWM time interval, and turn
off immediately after the PWM signal has transitioned high.
This is important because is allows the controller to quickly
respond to output voltage drops associated with current load
spikes, while avoiding the ring back affects associated with
other modulation schemes.
11
current source. External pull-up resistors or active-high
output stages can augment the pull-up current sources, up to
a voltage of 5V.
.
Intel VR11, AMD K8/K9 5-bit, and AMD 6-bit. The state of
the SS and VID7 pins decide which DAC version is active.
Refer to Table 1 for a description of how to select the desired
DAC version.
FN6455.2
October 8, 2009
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| ISL6315CRZ | 功能描述:IC REG CTRLR BUCK PWM VM 24-QFN RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 切换控制器 系列:- 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:2,500 系列:- PWM 型:电流模式 输出数:1 频率 - 最大:275kHz 占空比:50% 电源电压:18 V ~ 110 V 降压:无 升压:无 回扫:无 反相:无 倍增器:无 除法器:无 Cuk:无 隔离:是 工作温度:-40°C ~ 85°C 封装/外壳:8-SOIC（0.154"，3.90mm 宽） 包装:带卷 (TR) |
| ISL6315CRZ-T | 功能描述:IC REG CTRLR BUCK PWM VM 24-QFN RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 切换控制器 系列:- 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:2,500 系列:- PWM 型:电流模式 输出数:1 频率 - 最大:275kHz 占空比:50% 电源电压:18 V ~ 110 V 降压:无 升压:无 回扫:无 反相:无 倍增器:无 除法器:无 Cuk:无 隔离:是 工作温度:-40°C ~ 85°C 封装/外壳:8-SOIC（0.154"，3.90mm 宽） 包装:带卷 (TR) |
| ISL6315CRZ-TK | 功能描述:IC REG CTRLR BUCK PWM VM 24-QFN RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 切换控制器 系列:- 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:2,500 系列:- PWM 型:电流模式 输出数:1 频率 - 最大:275kHz 占空比:50% 电源电压:18 V ~ 110 V 降压:无 升压:无 回扫:无 反相:无 倍增器:无 除法器:无 Cuk:无 隔离:是 工作温度:-40°C ~ 85°C 封装/外壳:8-SOIC（0.154"，3.90mm 宽） 包装:带卷 (TR) |
| ISL6315IRZ | 功能描述:IC REG CTRLR BUCK PWM VM 24-QFN RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 切换控制器 系列:- 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:2,500 系列:- PWM 型:电流模式 输出数:1 频率 - 最大:275kHz 占空比:50% 电源电压:18 V ~ 110 V 降压:无 升压:无 回扫:无 反相:无 倍增器:无 除法器:无 Cuk:无 隔离:是 工作温度:-40°C ~ 85°C 封装/外壳:8-SOIC（0.154"，3.90mm 宽） 包装:带卷 (TR) |
| ISL6315IRZ-T | 功能描述:IC REG CTRLR BUCK PWM VM 24-QFN RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 切换控制器 系列:- 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:2,500 系列:- PWM 型:电流模式 输出数:1 频率 - 最大:275kHz 占空比:50% 电源电压:18 V ~ 110 V 降压:无 升压:无 回扫:无 反相:无 倍增器:无 除法器:无 Cuk:无 隔离:是 工作温度:-40°C ~ 85°C 封装/外壳:8-SOIC（0.154"，3.90mm 宽） 包装:带卷 (TR) |
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