参数资料
| 型号： | ISL6314IRZ-T |
| 厂商： | Intersil |
| 文件页数： | 16/32页 |
| 文件大小： | 0K |
| 描述： | IC CTRLR PWM 1PHASE BUCK 32-QFN |
| 产品培训模块： | Solutions for Industrial Control Applications |
| 标准包装： | 6,000 |
| 应用： | 控制器，Intel VR11，AMD CPU |
| 输入电压： | 5 V ~ 12 V |
| 输出数： | 1 |
| 输出电压： | 0.38 V ~ 1.6 V |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 32-VFQFN 裸露焊盘 |
| 供应商设备封装： | 32-QFN 裸露焊盘（5x5） |
| 包装： | 带卷 (TR) |
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ISL6314
The output of the error amplifier, V COMP , is compared to the
sawtooth waveform to generate the PWM signal. The PWM
signal controls the timing of the Internal MOSFET drivers
and regulates the converter output so that the voltage at FB
.
PHASE
V L (s)
L
DCR
INDUCTOR
I OUT
V OUT
is equal to the voltage at REF. This will regulate the output
voltage to be equal to Equation 4. The internal and external
circuitry that controls voltage regulation is illustrated in
Figure 4.
EXTERNAL CIRCUIT
ISL6314 INTERNAL CIRCUIT
ISEN-
R S
I
L
C OUT
R C
C C
COMP
C COMP
R COMP
ISENO
VID DAC
-
REF
C REF
2k
+
V DROOP
+ ISEN+
(OPTIONAL)
FB
-
V COMP
ISL6314
R FB
+
V OFS
-
VDIFF
ERROR AMPLIFIER
I OFS
FIGURE 5. DCR SENSING CONFIGURATION
As shown in Figure 5, a voltage, V DROOP , proportional to the
current in the channel, I OUT , feeds into the differential
remote-sense amplifier. The resulting voltage at the output of
+
V OUT
-
+
V DROOP
-
VSEN
RGND
ISEN+
ISENO
+
+
-
-
DIFFERENTIAL
REMOTE-SENSE
the remote-sense amplifier is the sum of the output voltage
and the droop voltage. Equation 5 shows that feeding this
voltage into the compensation network causes the regulator
to adjust the output voltage so that it’s equal to the reference
voltage minus the droop voltage.
The droop voltage, V DROOP , is created by sensing the
current through the output inductors. This is accomplished
by using a continuous DCR current sensing method.
? ------------- + 1 ?
? DCR ?
COMP
V ( s ) = -------------------------------------------------------------------------- ? ----------------------- ? ( I ) ? DCR (EQ. 6)
DROOP ( s ? R ? C + 1 ) R L
AMPLIFIER
FIGURE 4. OUTPUT VOLTAGE AND LOAD-LINE
REGULATION WITH OFFSET ADJUSTMENT
Load-Line (Droop) Regulation
Some microprocessor manufacturers require a
precisely-controlled output resistance. This dependence of
output voltage on load current is often termed “droop” or
“load line” regulation. By adding a well controlled output
impedance, the output voltage can effectively be level shifted
in a direction which works to achieve the load-line regulation
required by these manufacturers.
In other cases, the designer may determine that a more
cost-effective solution can be achieved by adding droop.
Droop can help to reduce the output-voltage spike that
results from fast load-current demand changes.
The magnitude of the spike is dictated by the ESR and ESL
of the output capacitors selected. By positioning the no-load
voltage level near the upper specification limit, a larger
negative spike can be sustained without crossing the lower
limit. By adding a well controlled output impedance, the
output voltage under load can effectively be level shifted
down so that a larger positive spike can be sustained without
crossing the upper specification limit.
16
Inductor windings have a characteristic distributed
resistance or DCR (Direct Current Resistance). For
simplicity, the inductor DCR is considered as a separate
lumped quantity, as shown in Figure 5. The channel current,
I L , flowing through the inductor, passes through the DCR.
Equation 5 shows the S-domain equivalent voltage, V L ,
across the inductor.
V L ( s ) = I L ? ( s ? L + DCR ) (EQ. 5)
The inductor DCR is important because the voltage dropped
across it is proportional to the channel current. By using a
simple R-C network and a current sense amplifier, as shown
in Figure 5, the voltage drop across the inductor ’s DCR can
be extracted. The output of the current sense amplifier,
V DROOP , can be shown to be proportional to the channel
current I L , shown in Equation 6.
s ? L
R
COMP COMP S
If the R-C network components are selected such that the
R-C time constant matches the inductor L/DCR time
constant, then V DROOP is equal to the voltage drop across
the DCR, multiplied by a gain. As Equation 7 shows,
V DROOP is therefore proportional to the total output current,
I OUT .
FN6455.2
October 8, 2009
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| ISL6315CRZ | 功能描述:IC REG CTRLR BUCK PWM VM 24-QFN RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 切换控制器 系列:- 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:2,500 系列:- PWM 型:电流模式 输出数:1 频率 - 最大:275kHz 占空比:50% 电源电压:18 V ~ 110 V 降压:无 升压:无 回扫:无 反相:无 倍增器:无 除法器:无 Cuk:无 隔离:是 工作温度:-40°C ~ 85°C 封装/外壳:8-SOIC（0.154"，3.90mm 宽） 包装:带卷 (TR) |
| ISL6315CRZ-T | 功能描述:IC REG CTRLR BUCK PWM VM 24-QFN RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 切换控制器 系列:- 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:2,500 系列:- PWM 型:电流模式 输出数:1 频率 - 最大:275kHz 占空比:50% 电源电压:18 V ~ 110 V 降压:无 升压:无 回扫:无 反相:无 倍增器:无 除法器:无 Cuk:无 隔离:是 工作温度:-40°C ~ 85°C 封装/外壳:8-SOIC（0.154"，3.90mm 宽） 包装:带卷 (TR) |
| ISL6315CRZ-TK | 功能描述:IC REG CTRLR BUCK PWM VM 24-QFN RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 切换控制器 系列:- 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:2,500 系列:- PWM 型:电流模式 输出数:1 频率 - 最大:275kHz 占空比:50% 电源电压:18 V ~ 110 V 降压:无 升压:无 回扫:无 反相:无 倍增器:无 除法器:无 Cuk:无 隔离:是 工作温度:-40°C ~ 85°C 封装/外壳:8-SOIC（0.154"，3.90mm 宽） 包装:带卷 (TR) |
| ISL6315IRZ | 功能描述:IC REG CTRLR BUCK PWM VM 24-QFN RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 切换控制器 系列:- 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:2,500 系列:- PWM 型:电流模式 输出数:1 频率 - 最大:275kHz 占空比:50% 电源电压:18 V ~ 110 V 降压:无 升压:无 回扫:无 反相:无 倍增器:无 除法器:无 Cuk:无 隔离:是 工作温度:-40°C ~ 85°C 封装/外壳:8-SOIC（0.154"，3.90mm 宽） 包装:带卷 (TR) |
| ISL6315IRZ-T | 功能描述:IC REG CTRLR BUCK PWM VM 24-QFN RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 切换控制器 系列:- 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:2,500 系列:- PWM 型:电流模式 输出数:1 频率 - 最大:275kHz 占空比:50% 电源电压:18 V ~ 110 V 降压:无 升压:无 回扫:无 反相:无 倍增器:无 除法器:无 Cuk:无 隔离:是 工作温度:-40°C ~ 85°C 封装/外壳:8-SOIC（0.154"，3.90mm 宽） 包装:带卷 (TR) |
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