参数资料
| 型号： | ISL6324ACRZ-T |
| 厂商： | Intersil |
| 文件页数： | 29/40页 |
| 文件大小： | 0K |
| 描述： | IC HYBRID CTRLR PWM DUAL 48QFN |
| 标准包装： | 4,000 |
| 应用： | 控制器，AMD SVI |
| 输入电压： | 5 V ~ 12 V |
| 输出数： | 2 |
| 输出电压： | 最高 2V |
| 工作温度： | 0°C ~ 70°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 48-VFQFN 裸露焊盘 |
| 供应商设备封装： | 48-QFN（7x7） |
| 包装： | 带卷 (TR) |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页当前第29页第30页第31页第32页第33页第34页第35页第36页第37页第38页第39页第40页
ISL6324A
TABLE 8. BITS [5:0] REGISTER RGS1 and RGS2
(VOLTAGE MARGINING OFFSET) (Continued)
Power Stages
The first step in designing a multi-phase converter is to
BIT5
VO5
0
0
BIT4
VO4
1
1
BIT3
VO3
1
1
BIT2
VO2
1
1
BIT1
VO1
1
1
BIT0
VO0
0
1
V OFFSET
(mV)
750
775
determine the number of phases. This determination depends
heavily on the cost analysis which in turn depends on system
constraints that differ from one design to the next. Principally,
the designer will be concerned with whether components can
be mounted on both sides of the circuit board, whether
The bits for Register RGS3 control some of the functionality
of the ISL6324A for Power Savings Mode. Bits 0 and 1
control the number of phases that the ISL6324A will drop to
when in Power Savings Mode. Bits 2 and 3 control the
number of PWM cycles between adding of phases when
exiting Power Savings Mode. Bits 4 and 5 control the
number of PWM cycles between dropping of phases when
entering Power Savings Mode. Bit 6 will disable/enable the
Core DAC offset when in Power Savings Mode. Bit 7 is
reserved. See Table 9 for a complete description of register
RGS3 bits and their functionality.
TABLE 9. BITS [7:0] REGISTER RGS3
through-hole components are permitted, the total board space
available for power-supply circuitry, and the maximum amount
of load current. Generally speaking, the most economical
solutions are those in which each phase handles between
25A and 30A. All surface-mount designs will tend toward the
lower end of this current range. If through-hole MOSFETs and
inductors can be used, higher per-phase currents are
possible. In cases where board space is the limiting
constraint, current can be pushed as high as 40A per phase,
but these designs require heat sinks and forced air to cool the
MOSFETs, inductors and heat dissipating surfaces.
MOSFETS
The choice of MOSFETs depends on the current each
Bit 7
Bit 6
0
1
Reserved
Core DAC Offset
ENABLED
DISABLED
MOSFET will be required to conduct, the switching frequency,
the capability of the MOSFETs to dissipate heat, and the
availability and nature of heat sinking and air flow.
LOWER MOSFET POWER CALCULATION
Bits [5:4] Number of PWM Cycles Between Dropping Phases
The calculation for power loss in the lower MOSFET is
I L ( P – P ) ? ( 1 – d )
? I M ? 2
P LOW , 1 = r DS ( ON ) ? ? ------ ? ? ( 1 – d ) + ---------------------------------------------- (EQ. 19)
00
01
10
11
Bits [3:2]
00
01
10
11
Bits [1:0]
00
01
1 PWM Cycle (default)
2 PWM Cycles
4 PWM Cycles
0 PWM Cycles (All Phases Drop at Once)
Number of PWM Cycles Between Adding Phases
1 PWM Cycle (Default)
2 PWM Cycles
4 PWM Cycles
0 PWM Cycles (All Phases Added at Once)
Number of Phases Active in Power Savings Mode
1 Phase
2 Phases (Default)
simple, since virtually all of the loss in the lower MOSFET is
due to current conducted through the channel resistance
(r DS(ON) ). In Equation 19, I M is the maximum continuous
output current, I P-P is the peak-to-peak inductor current (see
Equation 20), and d is the duty cycle (V OUT /V IN ).
2
? N ? 12
An additional term can be added to the lower-MOSFET loss
equation to account for additional loss accrued during the
dead time when inductor current is flowing through the
lower-MOSFET body diode. This term is dependent on the
diode forward voltage at I M , V D(ON) , the switching
frequency, f S , and the length of dead times, t d1 and t d2 , at
the beginning and the end of the lower-MOSFET conduction
interval respectively.
P LOW , 2 = V D ( ON ) ? f S ? ? ------ + I --------------- ? ? t
? I ?
? I
+ ? ------ – ---------------- ? ? t d2
? N
?
?
?
1X
3 Phases
M P – P
? N 2 ?
d1
M IP + P
2
?
General Design Guide
This design guide is intended to provide a high-level
explanation of the steps necessary to create a multi-phase
power converter. It is assumed that the reader is familiar with
many of the basic skills and techniques referenced in the
following sections. In addition to this guide, Intersil provides
complete reference designs that include schematics, bills of
materials, and example board layouts for all common
microprocessor applications.
29
(EQ. 20)
The total maximum power dissipated in each lower MOSFET
is approximated by the summation of P LOW,1 and P LOW,2 .
UPPER MOSFET POWER CALCULATION
In addition to r DS(ON) losses, a large portion of the upper
MOSFET losses are due to currents conducted across the
input voltage (V IN ) during switching. Since a substantially
higher portion of the upper-MOSFET losses are dependent on
switching frequency, the power calculation is more complex.
FN6880.2
May 14, 2010
相关PDF资料 |
PDF描述 |
|---|---|
| LT3028EDHC#PBF | IC REG LDO ADJ .5A/.1A 16-DFN |
| ISL8101IRZ-T | IC PWM CTRLR BUCK 2PHASE 24-QFN |
| MIC39501-2.5WU | IC REG LDO 2.5V 5A TO-263-5 |
| ISL6324CRZ-T | IC HYBRID CTRLR PWM DUAL 48-QFN |
| LT1963AEFE-3.3#PBF | IC REG LDO 3.3V 1.5A 16TSSOP |
相关代理商/技术参数 |
参数描述 |
|---|---|
| ISL6324ACRZ-TR5381 | 制造商:Intersil Corporation 功能描述:4+1 PHASE CONT., CORE + NORTHBRIDGE, PROG PSI, 3.4MHZ SVI, 5 - Tape and Reel 制造商:Intersil Corporation 功能描述:IC HYBRID CTRLR PWM DUAL 48QFN |
| ISL6324AIRZ | 功能描述:IC HYBRID CTRLR PWM DUAL 48QFN RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - 专用型 系列:- 标准包装:43 系列:- 应用:控制器，Intel VR11 输入电压:5 V ~ 12 V 输出数:1 输出电压:0.5 V ~ 1.6 V 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:48-VFQFN 裸露焊盘 供应商设备封装:48-QFN（7x7） 包装:管件 |
| ISL6324AIRZR5381 | 制造商:Intersil Corporation 功能描述:4+1 PHASE CONTROLLER, CORE + NORTHBRIDGE, PROG PSI, 3.4MHZ S - Rail/Tube 制造商:Intersil Corporation 功能描述:IC HYBRID CTRLR PWM DUAL 48QFN |
| ISL6324AIRZ-T | 功能描述:IC HYBRID CTRLR PWM DUAL 48QFN RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - 专用型 系列:- 标准包装:43 系列:- 应用:控制器，Intel VR11 输入电压:5 V ~ 12 V 输出数:1 输出电压:0.5 V ~ 1.6 V 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:48-VFQFN 裸露焊盘 供应商设备封装:48-QFN（7x7） 包装:管件 |
| ISL6324AIRZ-TR5381 | 制造商:Intersil Corporation 功能描述:4+1 PHASE CONTROLLER, CORE + NORTHBRIDGE, PROG PSI, 3.4MHZ S - Tape and Reel 制造商:Intersil Corporation 功能描述:IC HYBRID CTRLR PWM DUAL 48QFN |
发布紧急采购，3分钟左右您将得到回复。