参数资料
| 型号： | ISL6324CRZ-T |
| 厂商： | Intersil |
| 文件页数： | 25/38页 |
| 文件大小： | 0K |
| 描述： | IC HYBRID CTRLR PWM DUAL 48-QFN |
| 标准包装： | 4,000 |
| 应用： | 控制器，AMD SVI |
| 输入电压： | 5 V ~ 12 V |
| 输出数： | 2 |
| 输出电压： | 最高 2V |
| 工作温度： | 0°C ~ 70°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 48-VFQFN 裸露焊盘 |
| 供应商设备封装： | 48-QFN（7x7） |
| 包装： | 带卷 (TR) |
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ISL6324
the ISL6324, it sends the register address byte 0000_0000,
representing the internal register RGS1. The ISL6324 will
respond with an Acknowledge. After sending the data byte to
RGS1 and receiving an Acknowledge from the ISL6324,
instead of sending a Stop condition, the master sends the
data byte to be stored in register RGS2. The ISL6324 will
respond with an Acknowledge. The master then issues a
Stop condition, indicating to the ISL6324 that the current
transaction is complete. Once this transaction completes the
ISL6324 will immediately update and change the operating
parameters on-the-fly.
Reading from the Internal Registers
The ISL6324 has the ability to read from both registers
separately or read from them consecutively. Prior to reading
from an internal register, the master must first select the
desired register by writing to it and sending the register ’s
address byte. This process begins by the master sending a
control byte with the R/W bit set to 0, indicating a write. Once
it receives an Acknowledge from the ISL6324, it sends a
register address byte representing the internal register it
wants to read from (0000_0000 for RGS1 or 0000_0001 for
RGS2). The ISL6324 will respond with an Acknowledge. The
master must then respond with a Stop condition. After the
Stop condition, the master follows with a new Start condition,
and then sends a new control byte with the R/W bit set to 1,
indicating a read. The ISL6324 will then respond by sending
the master an Acknowledge, followed by the data byte
stored in that register. The master must then send a Not
Acknowledge followed by a Stop command, which will
complete the read transaction.
I 2 C Read and Write Protocol
WRITE TO A SINGLE REGISTER
It is also possible for both registers to be read consecutively.
To do this the master must read from register RGS1 first.
This transaction begins with the master sending a control
byte with the R/W bit set to 0. If it receives an Acknowledge
from the ISL6324, it sends the register address byte
0000_0000, representing the internal register RGS1. The
ISL6324 will respond with an Acknowledge. The master
must then respond with a Stop condition. After the Stop
condition the master follows with a new Start condition, and
then sends a new control byte with the R/W bit set to 1,
indicating a read. The ISL6324 will then respond by sending
the master an Acknowledge, followed by the data byte
stored in register RGS1. The master must then send an
Acknowledge, and after doing so, the ISL6324 will respond
by sending the data byte stored in register RGS2. The
master must then send a Not Acknowledge followed by a
Stop command, which will complete the read transaction.
Resetting the Internal Registers
The ISL6324’s two internal I 2 C registers always initialize to
0000_0000 when the controller first receives power. Once
the voltage on the VCC pin rises above the POR rising
threshold level, these registers can be changed at any time
via the I 2 C bus. If the voltage on the VCC pin falls below the
POR falling threshold, the internal registers are
automatically reset to 0000_0000.
It is possible to reset the internal registers without powering
down the controller and without requiring the controller to
stop regulating and soft-start again. Simply write to the
internal registers over the I 2 C bus to be 0000_0000.
S
SLAVE_ADDR + W
A
REG_ADDR
A
REG_DATA
A
P
WRITE TO BOTH REGISTERS
S
SLAVE_ADDR + W
A
0000_0000
A
REG_RGS1_DATA
A
REG_RGS2_DATA
A
P
READ FROM SINGLE REGISTER
S
SLAVE_ADDR + W
A
REG_ADDR
A
P
S
SLAVE_ADDR + R
A
REG_DATA
N
P
READ FROM BOTH REGISTERS
S
SLAVE_ADDR + W
A
0000_0000
A
P
S
SLAVE_ADDR + R
A
REG_RGS1_DATA
A
REG_RGS2_DATA
N
P
DRIVEN BY MASTER
DRIVEN BY ISL6324
25
S = START CONDITION
P = STOP CONDITION
A = ACKNOWLEDGE
N = NO ACKNOWLEDGE
FN6518.2
September 25, 2008
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| ISL6324IRZ | 功能描述:IC HYBRID CTRLR PWM DUAL 48-QFN RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - 专用型 系列:- 标准包装:43 系列:- 应用:控制器，Intel VR11 输入电压:5 V ~ 12 V 输出数:1 输出电压:0.5 V ~ 1.6 V 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:48-VFQFN 裸露焊盘 供应商设备封装:48-QFN（7x7） 包装:管件 |
| ISL6324IRZ-T | 功能描述:IC HYBRID CTRLR PWM DUAL 48-QFN RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - 专用型 系列:- 标准包装:43 系列:- 应用:控制器，Intel VR11 输入电压:5 V ~ 12 V 输出数:1 输出电压:0.5 V ~ 1.6 V 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:48-VFQFN 裸露焊盘 供应商设备封装:48-QFN（7x7） 包装:管件 |
| ISL6326AIRZ | 制造商:Rochester Electronics LLC 功能描述: 制造商:Intersil Corporation 功能描述: |
| ISL6326BCRZ | 功能描述:电流型 PWM 控制器 W/ANNEAL 4-PHS VR11 CNTRLR COM RoHS:否 制造商:Texas Instruments 开关频率:27 KHz 上升时间: 下降时间: 工作电源电压:6 V to 15 V 工作电源电流:1.5 mA 输出端数量:1 最大工作温度:+ 105 C 安装风格:SMD/SMT 封装 / 箱体:TSSOP-14 |
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