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参数资料
| 型号： | ISL6326CRZ-T |
| 厂商： | Intersil |
| 文件页数： | 13/30页 |
| 文件大小： | 0K |
| 描述： | IC REG CTRLR BUCK PWM VM 40-QFN |
| 标准包装： | 4,000 |
| PWM 型： | 电压模式 |
| 输出数： | 1 |
| 频率 - 最大： | 275kHz |
| 占空比： | 25% |
| 电源电压： | 4.75 V ~ 5.25 V |
| 降压： | 是 |
| 升压： | 无 |
| 回扫： | 无 |
| 反相： | 无 |
| 倍增器： | 无 |
| 除法器： | 无 |
| Cuk： | 无 |
| 隔离： | 无 |
| 工作温度： | 0°C ~ 70°C |
| 封装/外壳： | 40-VFQFN 裸露焊盘 |
| 包装： | 带卷 (TR) |
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ISL6326
RESISTIVE SENSING
For accurate current sense, a dedicated current-sense
resistor R SENSE in series with each output inductor can
serve as the current sense element (see Figure 4). This
technique is more accurate, but reduces overall converter
efficiency due to the additional power loss on the current
sense element R SENSE .
The same capacitor C T is needed to match the time delay
between ISEN- and ISEN+ signals. Select the proper C T to
keep the time constant of R ISEN and C T (R ISEN x C T ) close
to 27ns.
Equation 7 shows the ratio of the channel current to the
sensed current I SEN .
current balance, the power loss is equally dissipated over
multiple devices and a greater area.
Voltage Regulation
The compensation network shown in Figure 5 assures that
the steady-state error in the output voltage is limited only to
the error in the reference voltage (output of the DAC) and
offset errors in the OFS current source, remote-sense and
error amplifiers. Intersil specifies the guaranteed tolerance of
the ISL6326 to include the combined tolerances of each of
these elements.
The output of the error amplifier (V COMP ) is compared to
sawtooth waveforms to generate the PWM signals. The
PWM signals control the timing of the Intersil MOSFET
I SEN = I L ? -----------------------
R
R SENSE
ISEN
(EQ. 7)
drivers and regulate the converter output to the specified
reference voltage. The internal and external circuitry, which
control voltage regulation are illustrated in Figure 5 .
ISL6326 INTERNAL CIRCUIT
I n
L
IL
R SENSE V OUT
C OUT
R ISEN(n)
EXTERNAL CIRCUIT
R C C C
COMP
DAC
R REF
REF
C REF
ISL6326 INTERNAL CIRCUIT
+
CURRENT
FB
-
V COMP
SENSE
+
-
ISEN-(n)
R FB
+
V DROOP
-
IDROOP
VDIFF
I AVG
ERROR AMPLIFIER
ISEN+(n)
C T
SEN = I L --------------------------
I
R SENSE
R ISEN
V OUT +
VSEN
+
FIGURE 4. SENSE RESISTOR IN SERIES WITH INDUCTORS
V OUT -
RGND
-
The inductor DCR value will increase as the temperature
increases. Therefore the sensed current will increase as the
temperature of the current sense element increases. In order
to compensate the temperature effect on the sensed current
signal, a Positive Temperature Coefficient (PTC) resistor can
be selected for the sense resistor R ISEN , or the integrated
temperature compensation function of ISL6326 should be
utilized. The integrated temperature compensation function
Channel-Current Balance
The sensed current I n from each active channel is summed
together and divided by the number of active channels. The
resulting average current (I AVG ) provides a measure of the
total load current. Channel current balance is achieved by
comparing the sensed current of each channel to the
average current to make an appropriate adjustment to the
PWM duty cycle of each channel with Intersil’s patented
current-balance method.
Channel current balance is essential in achieving the
thermal advantage of multiphase operation. With good
13
DIFFERENTIAL
REMOTE-SENSE
AMPLIFIER
FIGURE 5. OUTPUT VOLTAGE AND LOAD-LINE
REGULATION WITH OFFSET ADJUSTMENT
The ISL6326 incorporates an internal differential
remote-sense amplifier in the feedback path. The amplifier
removes the voltage error encountered when measuring the
output voltage relative to the local controller ground
reference point resulting in a more accurate means of
sensing output voltage. Connect the microprocessor sense
pins to the non-inverting input (VSEN) and inverting input
(RGND) of the remote-sense amplifier. The remote-sense
output (V DIFF ) is connected to the inverting input of the error
amplifier through an external resistor.
A digital-to-analog converter (DAC) generates a reference
voltage based on the state of logic signals at pins VID7
through VID0. The DAC decodes the eight 6-bit logic signal
(VID) into one of the discrete voltages shown in Table 1.
Each VID input offers a 45μA pull-up to an internal 2.5V
source for use with open-drain outputs. The pull-up current
FN9262.1
May 5, 2008
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相关代理商/技术参数 |
参数描述 |
|---|---|
| ISL6326CRZ-TR5453 | 制造商:Intersil Corporation 功能描述:STD. ISL6326CRZ-T W/GOLD BOND WIRE ONLY - Tape and Reel |
| ISL6326IRZ | 功能描述:电流型 PWM 控制器 W/ANNEAL 4-PHS VR11 CNTRLR IND RoHS:否 制造商:Texas Instruments 开关频率:27 KHz 上升时间: 下降时间: 工作电源电压:6 V to 15 V 工作电源电流:1.5 mA 输出端数量:1 最大工作温度:+ 105 C 安装风格:SMD/SMT 封装 / 箱体:TSSOP-14 |
| ISL6326IRZ-T | 功能描述:电流型 PWM 控制器 W/ANNEAL 4-PHS VR11 CNTRLR IND RoHS:否 制造商:Texas Instruments 开关频率:27 KHz 上升时间: 下降时间: 工作电源电压:6 V to 15 V 工作电源电流:1.5 mA 输出端数量:1 最大工作温度:+ 105 C 安装风格:SMD/SMT 封装 / 箱体:TSSOP-14 |
| ISL6327ACRZ | 功能描述:IC REG CTRLR BUCK PWM 48-QFN RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 切换控制器 系列:- 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:2,500 系列:- PWM 型:电流模式 输出数:1 频率 - 最大:275kHz 占空比:50% 电源电压:18 V ~ 110 V 降压:无 升压:无 回扫:无 反相:无 倍增器:无 除法器:无 Cuk:无 隔离:是 工作温度:-40°C ~ 85°C 封装/外壳:8-SOIC（0.154"，3.90mm 宽） 包装:带卷 (TR) |
| ISL6327ACRZ-T | 功能描述:IC REG CTRLR BUCK PWM 48-QFN RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 切换控制器 系列:- 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:2,500 系列:- PWM 型:电流模式 输出数:1 频率 - 最大:275kHz 占空比:50% 电源电压:18 V ~ 110 V 降压:无 升压:无 回扫:无 反相:无 倍增器:无 除法器:无 Cuk:无 隔离:是 工作温度:-40°C ~ 85°C 封装/外壳:8-SOIC（0.154"，3.90mm 宽） 包装:带卷 (TR) |
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