参数资料
型号: ISL6327AIRZ
厂商: Intersil
文件页数: 25/29页
文件大小: 0K
描述: IC REG CTRLR BUCK PWM 48-QFN
标准包装: 43
PWM 型: 控制器
输出数: 6
频率 - 最大: 1MHz
电源电压: 4.75 V ~ 5.25 V
降压:
升压:
回扫:
反相:
倍增器:
除法器:
Cuk:
隔离:
工作温度: -40°C ~ 85°C
封装/外壳: 48-VFQFN 裸露焊盘
包装: 管件
ISL6327A
Compensation
The two opposing goals of compensating the voltage
each of the three cases in Equation 33, there are a separate
set of equations for the compensation components.
------------------- > f 0
R C = R FB --------------------------------------
0.75V
2 π V P-P R FB f 0
------------------- ≤ f 0 < ------------------------------
regulator are stability and speed. Depending on whether the
regulator employs the optional load-line regulation as
described in Load-Line Regulation, there are two distinct
methods for achieving these goals.
COMPENSATING LOAD-LINE REGULATED
CONVERTER
The load-line regulated converter behaves in a similar
manner to a peak-current mode controller because the two
poles at the output-filter L-C resonant frequency split with
Case 1:
Case 2:
1
2 π LC
2 π f 0 V P-P LC
IN
0.75V IN
C C = -------------------------------------
1 1
2 π LC 2 π C ( ESR )
R C = R FB ----------------------------------------------
0.75 V
C C = --------------------------------------------------------------
P-P R FB LC
( 2 π ) 2 f 2 V
the introduction of current information into the control loop.
The final location of these poles is determined by the system
function, the gain of the current signal, and the value of the
compensation components, R C and C C .
Since the system poles and zero are affected by the values
V P-P ( 2 π ) 2 f 02 LC
IN
0.75V IN
0
(EQ. 33)
f 0 > ------------------------------
0.75 V IN ( ESR )
2 π V P-P R FB f 0 L
of the components that are meant to compensate them, the
solution to the system equation becomes fairly complicated.
Fortunately there is a simple approximation that comes very
close to an optimal solution. Treating the system as though it
were a voltage-mode regulator by compensating the L-C
poles and the ESR zero of the voltage-mode approximation
yields a solution that is always stable with very close to ideal
transient performance.
.
Case 3:
1
2 π C ( ESR )
2 π f 0 V P-P L
R C = R FB ------------------------------------------
0.75V IN ( ESR ) C
C C = -------------------------------------------------
C 2 (OPTIONAL)
In Equation 33, L is the per-channel filter inductance divided
by the number of active channels; C is the sum total of all
output capacitors; ESR is the equivalent-series resistance of
R C
C C
COMP
the bulk output-filter capacitance; and V PP is the peak-to-
peak sawtooth signal amplitude as described in “Electrical
Specifications” on page 6.
FB
The optional capacitor C 2 , is sometimes needed to bypass
R FB
+
V DROOP
IDROOP
noise away from the PWM comparator (see Figure 18). Keep
a position available for C 2 , and be prepared to install a high
-
VDIFF
FIGURE 17. COMPENSATION CONFIGURATION FOR
LOAD-LINE REGULATED ISL6327A CIRCUIT
The feedback resistor, R FB , has already been chosen as
outlined in “Load-Line Regulation Resistor” on page 24.
Select a target bandwidth for the compensated system, f 0 .
The target bandwidth must be large enough to assure
adequate transient performance, but smaller than 1/3 of the
per-channel switching frequency. The values of the
compensation components depend on the relationships of f 0
to the L-C pole frequency and the ESR zero frequency. For
25
frequency capacitor of between 22pF and 150pF in case any
leading-edge jitter problem is noted.
Once selected, the compensation values in Equation 33
assure a stable converter with reasonable transient
performance. In most cases, transient performance can be
improved by making adjustments to R C . Slowly increase the
value of R C while observing the transient performance on an
oscilloscope until no further improvement is noted. Normally,
C C will not need adjustment. Keep the value of C C from
Equation 33 unless some performance issue is noted.
COMPENSATION WITHOUT LOAD-LINE REGULATION
The non load-line regulated converter is accurately modeled
as a voltage-mode regulator with two poles at the L-C
resonant frequency and a zero at the ESR frequency. A
type III controller, as shown in Figure 18, provides the
necessary compensation.
FN6833.0
February 17, 2009
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ISL6327AIRZ-T 功能描述:IC REG CTRLR BUCK PWM 48-QFN RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 切换控制器 系列:- 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:2,500 系列:- PWM 型:电流模式 输出数:1 频率 - 最大:275kHz 占空比:50% 电源电压:18 V ~ 110 V 降压:无 升压:无 回扫:无 反相:无 倍增器:无 除法器:无 Cuk:无 隔离:是 工作温度:-40°C ~ 85°C 封装/外壳:8-SOIC(0.154",3.90mm 宽) 包装:带卷 (TR)
ISL6327CRZ 功能描述:IC REG CTRLR BUCK PWM 48-QFN RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 切换控制器 系列:- 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:2,500 系列:- PWM 型:电流模式 输出数:1 频率 - 最大:275kHz 占空比:50% 电源电压:18 V ~ 110 V 降压:无 升压:无 回扫:无 反相:无 倍增器:无 除法器:无 Cuk:无 隔离:是 工作温度:-40°C ~ 85°C 封装/外壳:8-SOIC(0.154",3.90mm 宽) 包装:带卷 (TR)
ISL6327CRZ-T 功能描述:IC REG CTRLR BUCK PWM 48-QFN RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 切换控制器 系列:- 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:2,500 系列:- PWM 型:电流模式 输出数:1 频率 - 最大:275kHz 占空比:50% 电源电压:18 V ~ 110 V 降压:无 升压:无 回扫:无 反相:无 倍增器:无 除法器:无 Cuk:无 隔离:是 工作温度:-40°C ~ 85°C 封装/外壳:8-SOIC(0.154",3.90mm 宽) 包装:带卷 (TR)
ISL6327IRZ 功能描述:IC REG CTRLR BUCK PWM 48-QFN RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 切换控制器 系列:- 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:2,500 系列:- PWM 型:电流模式 输出数:1 频率 - 最大:275kHz 占空比:50% 电源电压:18 V ~ 110 V 降压:无 升压:无 回扫:无 反相:无 倍增器:无 除法器:无 Cuk:无 隔离:是 工作温度:-40°C ~ 85°C 封装/外壳:8-SOIC(0.154",3.90mm 宽) 包装:带卷 (TR)
ISL6327IRZ-T 功能描述:IC REG CTRLR BUCK PWM 48-QFN RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 切换控制器 系列:- 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:2,500 系列:- PWM 型:电流模式 输出数:1 频率 - 最大:275kHz 占空比:50% 电源电压:18 V ~ 110 V 降压:无 升压:无 回扫:无 反相:无 倍增器:无 除法器:无 Cuk:无 隔离:是 工作温度:-40°C ~ 85°C 封装/外壳:8-SOIC(0.154",3.90mm 宽) 包装:带卷 (TR)