参数资料
| 型号： | ISL6328IRZ |
| 厂商： | Intersil |
| 文件页数： | 19/33页 |
| 文件大小： | 0K |
| 描述： | IC CTRLR PWM SYNC BUCK DL 48QFN |
| 标准包装： | 50 |
| 应用： | 控制器，AMD SVI |
| 输入电压： | 5 V ~ 12 V |
| 输出数： | 2 |
| 输出电压： | 0.0125 V ~ 1.55 V |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | * |
| 封装/外壳： | * |
| 供应商设备封装： | * |
| 包装： | * |
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ISL6328
TABLE 4. DRPCTRL FUNCTIONALITY
V OUT
RESISTOR VALUE
CORE DROOP
NB DROOP
100k Ω
50k Ω
20k Ω
Disabled
Disabled
Enabled
Disabled
Enabled
Enabled
+
V OFS
-
R FB
VREF
E/A
0 Ω
Enabled
Disabled
FB
I OFS
If the DRPCTRL resistor is tied to ground, then the number of
phases in PSI mode is 1. If the DRPCTRL resistor is tied to VCC,
then the minimum number of phases in PSI mode is 2.
Output-Voltage Offset Programming
The ISL6328 allows the designer to accurately adjust the offset
voltage by connecting a resistor, R OFS , from the OFS pin to VCC or
GND. When R OFS is connected between OFS and VCC, the voltage
across it is regulated to 1.6V. This causes a proportional current
(I OFS ) to flow into the FB pin and out of the OFS pin. If R OFS is
connected to ground, the voltage across it is regulated to 0.3V,
and I OFS flows into the OFS pin and out of the FB pin. The offset
current flowing through the resistor between VDIFF and FB will
R OFS
OFS
GND
ISL6328
+
0.3V
-
GND
-
1.6V
+
VCC
0.3 ? R FB
R OFS = -----------------------
R OFS = -----------------------
V OFFSET
generate the desired offset voltage which is equal to the product
(I OFS x R FB ). These functions are shown in Figures 9 and 10.
Once the desired output offset voltage has been determined, use
the following formulas to set R OFS :
For Positive Offset (connect R OFS to GND):
(EQ. 18)
V OFFSET
For Negative Offset (connect R OFS to VCC):
1.6 ? R FB
(EQ. 19)
-
FIGURE 10. POSITIVE OFFSET OUTPUT VOLTAGE
PROGRAMMING
Dynamic VID
The AMD processor does not step the output voltage commands up or
down to the target voltage, but instead passes only the target voltage to
the ISL6328 through the SVI interface. The ISL6328 manages the
resulting VID-on-the-Fly transition in a controlled manner, supervising a
safe output voltage transition without discontinuity or disruption. The
ISL6328 begins slewing the DAC at 3.0mV/μs until the DAC and target
voltage are equal. Thus, the total time required for a dynamic VID
transition is dependent only on the size of the DAC change.
Advanced Adaptive Zero Shoot-Through
Deadtime Control (Patent Pending)
V OFS
+
R FB
VREF
E/A
The integrated drivers incorporate a unique adaptive deadtime
control technique to minimize deadtime, resulting in high efficiency
FB
I OFS
VCC
from the reduced freewheeling time of the lower MOSFET
body-diode conduction, and to prevent the upper and lower
MOSFETs from conducting simultaneously. This is accomplished by
ensuring either rising gate turns on its MOSFET with minimum and
sufficient delay after the other has turned off.
During turn-off of the lower MOSFET, the PHASE voltage is
monitored until it reaches a -0.3V/+0.8V (forward/reverse inductor
current). At this time the UGATE is released to rise. An auto-zero
R OFS
OFS
ISL6328
+
-
0.3V
-
+
1.6V
comparator is used to correct the r DS(ON) drop in the phase voltage
preventing false detection of the -0.3V phase level during r DS(ON)
conduction period. In the case of zero current, the UGATE is released
after 35ns delay of the LGATE dropping below 0.5V. When LGATE
first begins to transition low, this quick transition can disturb the
GND
FIGURE 9. NEGATIVE OFFSET OUTPUT VOLTAGE
PROGRAMMING
19
VCC
PHASE node and cause a false trip, so there is 20ns of blanking
time once LGATE falls until PHASE is monitored.
Once the PHASE is high, the advanced adaptive shoot-through
circuitry monitors the PHASE and UGATE voltages during a PWM
falling edge and the subsequent UGATE turn-off. If either the
UGATE falls to less than 1.75V above the PHASE or the PHASE
falls to less than +0.8V, the LGATE is released to turn-on.
FN7621.1
June 7, 2011
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相关代理商/技术参数 |
参数描述 |
|---|---|
| ISL6328IRZ-T | 功能描述:IC CTRLR PWM SYNC BUCK DL 48QFN RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - 专用型 系列:- 标准包装:2,000 系列:- 应用:控制器，DSP 输入电压:4.5 V ~ 25 V 输出数:2 输出电压:最低可调至 1.2V 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:30-TFSOP（0.173"，4.40mm 宽） 供应商设备封装:30-TSSOP 包装:带卷 (TR) |
| ISL6329CRZ | 功能描述:电压模式 PWM 控制器 6+1 PHS DL PWM CONTRLR FOR CORE RoHS:否 制造商:Texas Instruments 输出端数量:1 拓扑结构:Buck 输出电压:34 V 输出电流: 开关频率: 工作电源电压:4.5 V to 5.5 V 电源电流:600 uA 最大工作温度:+ 125 C 最小工作温度:- 40 C 封装 / 箱体:WSON-8 封装:Reel |
| ISL6329CRZ-T | 功能描述:电压模式 PWM 控制器 6+1 PHS DL PWM CONTRLR FOR CORE RoHS:否 制造商:Texas Instruments 输出端数量:1 拓扑结构:Buck 输出电压:34 V 输出电流: 开关频率: 工作电源电压:4.5 V to 5.5 V 电源电流:600 uA 最大工作温度:+ 125 C 最小工作温度:- 40 C 封装 / 箱体:WSON-8 封装:Reel |
| ISL6329EVAL1Z | 制造商:Intersil Corporation 功能描述:ISL6329 EVALUATION BOARD - 60 LEAD - QFN - ROHS COMPLIANT - Bulk |
| ISL6329IRZ | 功能描述:电压模式 PWM 控制器 6+1 PHS DL PWM CONTRLR FOR CORE RoHS:否 制造商:Texas Instruments 输出端数量:1 拓扑结构:Buck 输出电压:34 V 输出电流: 开关频率: 工作电源电压:4.5 V to 5.5 V 电源电流:600 uA 最大工作温度:+ 125 C 最小工作温度:- 40 C 封装 / 箱体:WSON-8 封装:Reel |
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