参数资料
型号: ISL6328IRZ
厂商: Intersil
文件页数: 5/33页
文件大小: 0K
描述: IC CTRLR PWM SYNC BUCK DL 48QFN
标准包装: 50
应用: 控制器,AMD SVI
输入电压: 5 V ~ 12 V
输出数: 2
输出电压: 0.0125 V ~ 1.55 V
工作温度: -40°C ~ 85°C
安装类型: *
封装/外壳: *
供应商设备封装: *
包装: *
ISL6328
Pin Configuration
ISL6328
(48 LD QFN)
TOP VIEW
48
47
46
45
44
43
42
41
40
39
38
37
COMP_NB
FB_NB
VSEN_NB
DRPCTRL
SVC
1
2
3
4
5
36
35
34
33
32
PWM4
PWROK
VDDPWRGD
PHASE1
UGATE1
SVD
VCC
RSVD
OFS
OCP
TCOMP1
TCOMP2
6
7
8
9
10
11
12
49
GND
31
30
29
28
27
26
25
BOOT1
LGATE1
GVOT
LGATE2
BOOT2
UGATE2
EN
13
14
15
16
17
18
19
20
21
22
23
24
Functional Pin Descriptions
PIN NAME
COMP_NB
FB_NB
VSEN_NB
DRPCTRL
SVC
SVD
VCC
RSVD
OFS
PIN NUMBER
1
2
3
4
5
6
7
8
9
5
DESCRIPTION
Output of the internal error amplifier for the Northbridge regulator.
Inverting input to the internal error amplifier for the Northbridge regulator.
Non-inverting input to the Northbridge regulator precision differential remote-sense amplifier. This pin
should be connected to the remote Northbridge sense pin of the processor, VDDNB_SENSE.
Droop Control for Core and Northbridge. This pin is used to set up one of four user programmable selections
via a resistor: Core Droop On and Northbridge Droop On; Core Droop Off and Northbridge Droop On, Core
Droop On and Northbridge Droop Off; Core Droop Off and Northbridge Droop Off.
If the resistor is tied to ground, the number of active phases in PSI mode is 1. If the resistor is tied to
VCC, the number of active phases in PSI mode is 2.
Serial VID clock input from the AMD processor.
Serial VID data bi-directional signal to and from the master device on AMD processor.
VCC is the bias supply for the ICs small-signal circuitry. Connect this pin to a +5V supply and decouple
using a quality 0.1μF ceramic capacitor.
RESERVED. Connect this pin directly to the VCC pin.
The OFS pin provides a means to program a DC current for generating an offset voltage across the resistor
between FB and VSEN. The offset current is generated via an external resistor and precision internal
voltage references. The polarity of the offset is selected by connecting the resistor to GND or VCC. For no
offset, the OFS pin should be left unconnected.
FN7621.1
June 7, 2011
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