参数资料
型号: ISL6336BCRZ
厂商: Intersil
文件页数: 27/31页
文件大小: 0K
描述: IC CTRLR PWM SYNC BUCK 48-QFN
标准包装: 43
应用: 控制器,Intel VR11.1
输入电压: 3 V ~ 12 V
输出数: 1
输出电压: 0.5 V ~ 1.6 V
工作温度: 0°C ~ 70°C
安装类型: 表面贴装
封装/外壳: 48-VFQFN 裸露焊盘
供应商设备封装: 48-QFN(7x7)
包装: 管件
产品目录页面: 1248 (CN2011-ZH PDF)
ISL6336B
R C
C 2 (OPTIONAL)
C C
COMP
FB
ISL6336B
The optional capacitor C 2 , is sometimes needed to bypass
noise away from the PWM comparator (see Figure 19). Keep
a position available for C 2 , and be prepared to install a high
frequency capacitor between 22pF and 150pF in case
excessive jitter is noted.
Once selected, the compensation values in Equation 37
ensure a stable converter with reasonable transient
R FB
+
V DROOP
-
VDIFF
performance. In most cases, transient performance can be
improved by making adjustments to R C . Slowly increase the
value of R C while observing the transient performance on an
oscilloscope until no further improvement is noted. Normally,
FIGURE 19. COMPENSATION CONFIGURATION FOR
LOAD-LINE REGULATED ISL6336B CIRCUIT
The feedback resistor, R FB , has already been chosen as
Select a target bandwidth for the compensated system, f 0 .
The target bandwidth must be large enough to ensure
adequate transient performance, but generally smaller than
1/3 of the per-channel switching frequency. The values of the
compensation components depend on the relationships of f 0
to the L-C pole frequency and the ESR zero frequency. For
each of the three cases which follow, there are a separate
set of equations for the compensation components.
C C will not need adjustment. Keep the value of C C from
Equation 37 unless some performance issue is noted.
C 1 and R 1 can also be added to improve transient
performance per the type III compensation discussion in the
following.
COMPENSATION WITHOUT LOAD-LINE REGULATION
The non load-line regulated converter is accurately modeled
as a voltage-mode regulator with two poles at the L-C
resonant frequency and a zero at the ESR frequency. A
type III controller, as shown in Figure 20, provides the
necessary compensation.
C 2
ISL6336B
------------------- > f 0
Case 1:
1
2 π LC
R C
C C
COMP
2 π f 0 V P-P LC
R C = R FB --------------------------------------
0.75V
0.75V IN
2 π V P-P R FB f 0
IN
C C = -------------------------------------
C 1
R 1
R FB
FB
------------------- ≤ f 0 < ------------------------------
Case 2:
1 1
2 π LC 2 π C ( ESR )
VDIFF
R C = R FB ----------------------------------------------
C C = --------------------------------------------------------------
V P-P ( 2 π ) 2 f 02 LC
0.75 V IN
0.75V IN
( 2 π ) 2 f 02 V P-P R FB LC
(EQ. 37)
FIGURE 20. COMPENSATION CIRCUIT FOR ISL6336B BASED
CONVERTER WITHOUT LOAD-LINE
REGULATION
The first step is to choose the desired bandwidth, f 0 , of the
compensated system. Choose a frequency high enough to
f 0 > ------------------------------
2 π f 0 V P-P L
0.75 V IN ( ESR )
Case 3:
1
2 π C ( ESR )
R C = R FB ------------------------------------------
ensure adequate transient performance but generally not
higher than 1/3 of the switching frequency. The type-III
compensator has an extra high-frequency pole, f HF . This
pole can be used for added noise rejection or to ensure
adequate attenuation at the error-amplifier high-order pole
0.75V IN ( ESR ) C
2 π V P-P R FB f 0 L
C C = -------------------------------------------------
In Equation 37, L is the per-channel filter inductance divided
by the number of active channels; C is the sum total of all
output capacitors; ESR is the equivalent-series resistance of
the bulk output-filter capacitance; and V P-P is the
peak-to-peak sawtooth signal amplitude as described in the
“Electrical Specifications” table beginning on page 7.
27
and zero frequencies. A good general rule is to choose
f HF = 10f 0 , but it can be higher if desired. Choosing f HF to be
lower than 10f 0 can cause problems with too much phase
shift below the system bandwidth.
In the solutions to the compensation equations, there is a
single degree of freedom. For the solutions presented in
Equation 38, R FB is selected arbitrarily. The remaining
FN6696.2
August 31, 2010
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