参数资料
型号: ISL6523CBZ-T
厂商: Intersil
文件页数: 10/16页
文件大小: 0K
描述: IC CTRLR VRM8.5 PWM DUAL 28-SOIC
标准包装: 1,000
应用: 控制器,Intel VRM8.5
输入电压: 5 V ~ 15 V
输出数: 4
输出电压: 多重
工作温度: 0°C ~ 70°C
安装类型: 表面贴装
封装/外壳: 28-SOIC(0.295",7.50mm 宽)
供应商设备封装: 28-SOIC W
包装: 带卷 (TR)
ISL6523
Layout Considerations
MOSFETs switch very fast and efficiently. The speed with
The wiring traces from the control IC to the MOSFET gate
and source should be sized to carry 2A peak currents.
which the current transitions from one device to another
causes voltage spikes across the interconnecting
+5V IN
L IN
impedances and parasitic circuit elements. The voltage
spikes can degrade efficiency, radiate noise into the circuit,
and lead to device overvoltage stress. Careful component
C IN
+12V
C OCSET2
C VCC
VCC GND
C OCSET1
layout and printed circuit design minimizes the voltage
spikes in the converter. Consider, as an example, the turn-off
transition of the upper MOSFET. Prior to turn-off, the upper
MOSFET was carrying the full load current. During the turn-
off, current stops flowing in the upper MOSFET and is picked
up by the lower MOSFET or Schottky diode. Any inductance
in the switched current path generates a large voltage spike
during the switching interval. Careful component selection,
tight layout of the critical components, and short, wide circuit
traces minimize the magnitude of voltage spikes.
V OUT2
V OUT3
R OCSET2
Q3
L OUT2
C OUT2 CR2
C SS24,13
OCSET2
OCSET1
UGATE2
UGATE1
PHASE2
PHASE1
LGATE1
SS24
SS13
ISL6523
Q2
R OCSET1
Q1
L OUT1
C OUT1
CR1
V OUT1
V OUT4
There are two sets of critical components in a DC-DC
converter using an ISL6523 controller. The switching power
components are the most critical because they switch large
amounts of energy, and as such, they tend to generate
equally large amounts of noise. The critical small signal
C OUT3
+3.3V IN
Q4
DRIVE3 DRIVE4
PGND
Q5
C OUT4
components are those connected to sensitive nodes or
those supplying critical bypass current.
The power components and the controller IC should be
placed first. Locate the input capacitors, especially the high-
KEY
ISLAND ON POWER PLANE LAYER
ISLAND ON CIRCUIT PLANE LAYER
VIA/THROUGH-HOLE CONNECTION TO GROUND PLANE
frequency ceramic de-coupling capacitors, close to the
power switches. Locate the output inductor and output
capacitors between the MOSFETs and the load. Locate the
PWM controller close to the MOSFETs.
The critical small signal components include the bypass
capacitor for VCC and the soft-start capacitor, C SS . Locate
these components close to their connecting pins on the
control IC. Minimize any leakage current paths from any SS
node, since the internal current source is only 28 μ A.
A multi-layer printed circuit board is recommended. Figure 9
shows the connections of the critical components in the
converter. Note that the capacitors C IN and C OUT each
could represent numerous physical capacitors. Dedicate one
solid layer for a ground plane and make all critical
component ground connections with vias to this layer.
Dedicate another solid layer as a power plane and break this
plane into smaller islands of common voltage levels. The
power plane should support the input power and output
power nodes. Use copper filled polygons on the top and
bottom circuit layers for the PHASE nodes, but do not
unnecessarily oversize these particular islands. Since the
PHASE nodes are subjected to very high dV/dt voltages, the
stray capacitor formed between these islands and the
surrounding circuitry will tend to couple switching noise. Use
the remaining printed circuit layers for small signal wiring.
10
FIGURE 9. PRINTED CIRCUIT BOARD POWER PLANES AND
ISLANDS
PWM1 Controller Feedback Compensation
Both PWM controllers use voltage-mode control for output
regulation. This section highlights the design consideration
for a voltage-mode controller requiring external
compensation. Apply these methods and considerations
only to the synchronous PWM controller. The considerations
for the standard PWM controller are presented separately.
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