参数资料
| 型号： | ISL6566ACRZ |
| 厂商： | Intersil |
| 文件页数： | 11/28页 |
| 文件大小： | 0K |
| 描述： | IC CTRLR PWM 3PHASE BUCK 40-QFN |
| 标准包装： | 500 |
| 应用： | 控制器，Intel VRM9，VRM10，AMD Hammer 应用 |
| 输入电压： | 3 V ~ 12 V |
| 输出数： | 1 |
| 输出电压： | 0.8 V ~ 1.6 V |
| 工作温度： | 0°C ~ 70°C |
| 安装类型： | * |
| 封装/外壳： | 40-VFQFN 裸露焊盘 |
| 供应商设备封装： | * |
| 包装： | 管件 |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页当前第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页
ISL6566A
V IN
TABLE 2. AMD HAMMER VOLTAGE IDENTIFICATION CODES
DS ( ON )
I n
I
r
R
SEN = I L --------------------------
ISEN
CHANNEL N
UPPER MOSFET
VID4
1
VID3
1
VID2
1
VID1
1
VID0
1
VDAC
Off
I L
1
1
1
1
0
0.800
SAMPLE
&
HOLD
-
+
ISEN(n)
R ISEN
-
I L r DS ( ON )
1
1
1
1
1
1
1
1
1
1
0
0
0
0
1
1
1
0
1
0
0.825
0.850
0.875
0.900
+
CHANNEL N
LOWER MOSFET
1
1
0
0
1
0.925
ISL6565A INTERNAL CIRCUIT
EXTERNAL CIRCUIT
1
1
1
0
0
1
0
1
0
1
0.950
0.975
FIGURE 5. ISL6566A INTERNAL AND EXTERNAL CURRENT-
SENSING CIRCUITRY FOR CURRENT BALANCE
The ISL6566A senses the channel load current by sampling
the voltage across the lower MOSFET r DS(ON) , as shown in
Figure 5. A ground-referenced operational amplifier, internal
to the ISL6566A, is connected to the PHASE node through a
resistor, R ISEN . The voltage across R ISEN is equivalent to
the voltage drop across the r DS(ON) of the lower MOSFET
while it is conducting. The resulting current into the ISEN pin
is proportional to the channel current, I L . The ISEN current is
sampled and held as described in the Current Sampling
section. From Figure 5, the following equation for I n is
derived where I L is the channel current.
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
0
1
0
1
0
1
0
1
0
1
1.000
1.025
1.050
1.075
1.100
1.125
1.150
1.175
1.200
1.225
I n = I L ---------------------- )
r DS ( ON
R ISEN
(EQ. 3)
0
0
1
1
1
0
0
1
0
1
1.250
1.275
The ISL6566A accommodates three different DAC ranges:
Output Voltage Setting
The ISL6566A uses a digital to analog converter (DAC) to
generate a reference voltage based on the logic signals at the
VID pins. The DAC decodes the 5 or 6-bit logic signals into
one of the discrete voltages shown in Tables 2, 3, and 4.
Each VID pin is pulled up to an internal 1.2V voltage by a
weak current source (40 μ A current), which decreases to 0 as
the voltage at the VID pin varies from 0 to the internal 1.2V
pull-up voltage. External pull-up resistors or active-high
output stages can augment the pull-up current sources, up to
a voltage of 5V.
.
Intel VRM9.0, AMD Hammer, or Intel VRM10.0. The state of
the VRM10 and VID12.5 pins decide which DAC version is
0
0
0
0
0
0
0
0
0
0
0
1
1
1
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
0
0
0
0
1
0
0
1
1
0
0
1
1
0
0
0
1
0
1
0
1
0
1
0
1
0
1.300
1.325
1.350
1.375
1.400
1.425
1.450
1.475
1.500
1.525
1.550
active. Refer to Table 1 for a description of how to select the
desired DAC version.
TABLE 3. VRM9 VOLTAGE IDENTIFICATION CODES
TABLE 1. ISL6566A DAC SELECT TABLE
VID4
VID3
VID2
VID1
VID0
VDAC
DAC VERSION
VRM10.0
VRM9.0
AMD HAMMER
VRM10 PIN
High
Low
Low
VID12.5 PIN
-
High
Low
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
1
0
1
0
Off
1.100
1.125
1.150
1
1
0
1
1
1.175
11
FN9200.2
July 27, 2005
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