参数资料
型号: ISL6566ACRZ
厂商: Intersil
文件页数: 17/28页
文件大小: 0K
描述: IC CTRLR PWM 3PHASE BUCK 40-QFN
标准包装: 500
应用: 控制器,Intel VRM9,VRM10,AMD Hammer 应用
输入电压: 3 V ~ 12 V
输出数: 1
输出电压: 0.8 V ~ 1.6 V
工作温度: 0°C ~ 70°C
安装类型: *
封装/外壳: 40-VFQFN 裸露焊盘
供应商设备封装: *
包装: 管件
ISL6566A
Hysteresis between the rising and falling thresholds
assure that once enabled, the ISL6566A will not
inadvertently turn off unless the PVCC bias voltage drops
substantially (see Electrical Specifications ).
5. The VID code must not be 111111 or 111110 in VRM10
mode or 11111 in AMD Hammer or VRM9 modes. These
codes signal the controller that no load is present. The
controller will enter shut-down mode after receiving either
of these codes and will execute soft-start upon receiving
OUTPUT PRECHARGED
ABOVE DAC LEVEL
OUTPUT PRECHARGED
BELOW DAC LEVEL
any other code. These codes can be used to enable or
disable the controller but it is not recommended. After
receiving one of these codes, the controller executes a
2-cycle delay before changing the overvoltage trip level to
the shut-down level and disabling PWM. Overvoltage
shutdown cannot be reset using one of these codes.
When each of these conditions is true, the controller
GND>
GND>
T1 T2
T3
V OUT (0.5V/DIV)
ENLL (5V/DIV)
immediately begins the soft-start sequence.
Soft-Start
The soft-start function allows the converter to bring up the
output voltage in a controlled fashion, resulting in a linear
ramp-up. Following a delay of 16 PHASE clock cycles
between enabling the chip and the start of the ramp, the
output voltage progresses at a fixed rate of 12.5mV per each
FIGURE 12. SOFT-START WAVEFORMS FOR ISL6566A-
BASED MULTI-PHASE CONVERTER
R OCSET
16 PHASE clock cycles.
ICOMP
-
V OCSET
+
OCSET
Thus, the soft-start period (not including the 16 PHASE clock
IREF
V DAC ? 1280
f S
cycle delay) up to a given voltage, V DAC , can be
approximated by the following equation
T SS = ---------------------------------
(EQ. 13)
ISUM
+
ISEN
-
-
V DROOP
+
100uA
where V DAC is the DAC-set VID voltage, and f S is the
switching frequency.
VDIFF
+1V
+
-
OC
The ISL6566A also has the ability to start up into a pre-
charged output, without causing any unnecessary
disturbance. The FB pin is monitored during soft-start, and
should it be higher than the equivalent internal ramping
VID + 150mV
reference voltage, the output drives hold both MOSFETs off.
Once the internal ramping reference exceeds the FB pin
potential, the output drives are enabled, allowing the output
to ramp from the pre-charged level to the final level dictated
by the DAC setting. Should the output be pre-charged to a
level exceeding the DAC setting, the output drives are
V OVP
SOFT-START, FAULT
AND CONTROL LOGIC
-
enabled at the end of the soft-start period, leading to an
abrupt correction in the output voltage down to the DAC-set
level.
VSEN
RGND
+
-
x1
+
-
OV
UV
PGOOD
+
0.82 x DAC
ISL6566A INTERNAL CIRCUITRY
FIGURE 13. POWER GOOD AND PROTECTION CIRCUITRY
17
FN9200.2
July 27, 2005
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ISL6566ACRZ-T 功能描述:IC CTRLR PWM 3PHASE BUCK 40-QFN RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - 专用型 系列:- 标准包装:43 系列:- 应用:控制器,Intel VR11 输入电压:5 V ~ 12 V 输出数:1 输出电压:0.5 V ~ 1.6 V 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:48-VFQFN 裸露焊盘 供应商设备封装:48-QFN(7x7) 包装:管件
ISL6566AIRZ 功能描述:IC CTRLR PWM 3PHASE BUCK 40-QFN RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - 专用型 系列:- 标准包装:43 系列:- 应用:控制器,Intel VR11 输入电压:5 V ~ 12 V 输出数:1 输出电压:0.5 V ~ 1.6 V 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:48-VFQFN 裸露焊盘 供应商设备封装:48-QFN(7x7) 包装:管件
ISL6566AIRZ-T 功能描述:IC CTRLR PWM 3PHASE BUCK 40-QFN RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - 专用型 系列:- 标准包装:43 系列:- 应用:控制器,Intel VR11 输入电压:5 V ~ 12 V 输出数:1 输出电压:0.5 V ~ 1.6 V 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:48-VFQFN 裸露焊盘 供应商设备封装:48-QFN(7x7) 包装:管件
ISL6566CR 功能描述:IC CTRLR PWM BUCK 3PHASE 40-QFN RoHS:否 类别:集成电路 (IC) >> PMIC - 稳压器 - 专用型 系列:- 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:2,000 系列:- 应用:电源,ICERA E400,E450 输入电压:4.1 V ~ 5.5 V 输出数:10 输出电压:可编程 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:42-WFBGA,WLCSP 供应商设备封装:42-WLP 包装:带卷 (TR)
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