参数资料
| 型号： | ISL6568IRZ-TR5184 |
| 厂商： | Intersil |
| 文件页数： | 25/30页 |
| 文件大小： | 0K |
| 描述： | IC CTRLR PWM 2PHASE BUCK 32-QFN |
| 标准包装： | 6,000 |
| 应用： | 控制器，Intel VRM9，VRM10，AMD Hammer 应用 |
| 输入电压： | 3 V ~ 12 V |
| 输出数： | 1 |
| 输出电压： | 0.84 V ~ 1.6 V |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 32-VFQFN 裸露焊盘 |
| 供应商设备封装： | 32-QFN（5x5） |
| 包装： | 带卷 (TR) |
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ISL6568
bulk capacitors having high capacitance but limited
high-frequency performance. Minimizing the ESL of the
high-frequency capacitors allows them to support the output
voltage as the current increases. Minimizing the ESR of the
bulk capacitors allows them to supply the increased current
with less output voltage deviation.
The ESR of the bulk capacitors also creates the majority of the
output-voltage ripple. As the bulk capacitors sink and source
the inductor ac ripple current (See “Interleaving” and
Equation 2 on page 10), a voltage develops across the bulk
capacitor ESR equal to I C(P-P) (ESR). Thus, once the output
capacitors are selected, the maximum allowable ripple
1000
100
voltage, V P-P(MAX) , determines the lower limit on the
inductance as shown by Equation 31.
10
10
100
1000
10000
? V ?
? IN – N V OUT ? V OUT
L ≥ ( ESR ) ------------------------------------------------------------
f S V IN V P-P ( MAX )
(EQ. 31)
SWITCHINGFREQUENCY (kHz)
FIGURE 21. R T vs SWITCHING FREQUENCY
Input Capacitor Selection
Since the capacitors are supplying a decreasing portion of the
load current while the regulator recovers from the transient,
the capacitor voltage becomes slightly depleted. The output
inductors must be capable of assuming the entire load current
before the output voltage decreases more than Δ V MAX . This
places an upper limit on inductance.
Equation 32 gives the upper limit on L for the cases when the
trailing edge of the current transient causes a greater
output-voltage deviation than the leading edge. Equation 33
addresses the leading edge. Normally, the trailing edge
dictates the selection of L because duty cycles are usually less
than 50%. Nevertheless, both inequalities should be
evaluated, and L should be selected based on the lower of the
two results. In each equation, L is the per-channel inductance,
C is the total output capacitance, and N is the number of active
channels.
The input capacitors are responsible for sourcing the AC
component of the input current flowing into the upper
MOSFETs. Their RMS current capacity must be sufficient to
handle the ac component of the current drawn by the upper
MOSFETs which is related to duty cycle and the number of
active phases.
0.3
0.2
0.1
L ≤ --------------------------------- Δ V MAX – ( Δ I ? ESR )
2 ? N ? C ? V O
( Δ I ) 2
(EQ. 32)
I L(P-P) = 0
I L(P-P) = 0.5 I O
I L(P-P) = 0.75 I O
L ≤ ---------------------------------- Δ V MAX – ( Δ I ? ESR ) ? V IN – V O ?
( Δ I ) 2
( 1.25 ) ? N ? C
? ?
(EQ. 33)
0
0
0.2
0.4 0.6
DUTY CYCLE (V IN/ V O )
0.8
1.0
Switching Frequency
There are a number of variables to consider when choosing the
switching frequency, as there are considerable effects on the
upper MOSFET loss calculation. These effects are outlined in
the switching frequency. The lower limit is established by the
requirement for fast transient response and small
the regulator to meet the transient-response requirements.
Switching frequency is determined by the selection of the
frequency-setting resistor, R T . Figure 21 and Equation 34 are
provided to assist in selecting the correct value for R T .
FIGURE 22. NORMALIZED INPUT-CAPACITOR RMS CURRENT FOR
2-PHASE CONVERTER
For a two-phase design, use Figure 22 to determine the
input-capacitor RMS current requirement set by the duty cycle,
maximum sustained output current (I O ), and the ratio of the
peak-to-peak inductor current (I L(P-P) ) to I O . Select a bulk
capacitor with a ripple current rating which will minimize the
total number of input capacitors required to support the RMS
current calculated. The voltage rating of the capacitors should
also be at least 1.25x greater than the maximum input
voltage. Figure 23 provides the same input RMS current
information for single-phase designs. Use the same approach
for selecting the bulk capacitor type and number.
R T = 10
[ 10.61 – 1.035 log ( f S ) ]
25
(EQ. 34)
FN9187.5
January 12, 2012
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| ISL6569ACB | 功能描述:IC REG CTRLR BUCK PWM 24-SOIC RoHS:否 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 切换控制器 系列:- 标准包装:2,500 系列:- PWM 型:电流模式 输出数:1 频率 - 最大:500kHz 占空比:100% 电源电压:8.2 V ~ 30 V 降压:无 升压:无 回扫:是 反相:无 倍增器:无 除法器:无 Cuk:无 隔离:是 工作温度:0°C ~ 70°C 封装/外壳:8-DIP（0.300"，7.62mm） 包装:管件 产品目录页面:1316 (CN2011-ZH PDF) |
| ISL6569ACB-T | 功能描述:IC REG CTRLR BUCK PWM 24-SOIC RoHS:否 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 切换控制器 系列:- 标准包装:2,500 系列:- PWM 型:电流模式 输出数:1 频率 - 最大:500kHz 占空比:100% 电源电压:8.2 V ~ 30 V 降压:无 升压:无 回扫:是 反相:无 倍增器:无 除法器:无 Cuk:无 隔离:是 工作温度:0°C ~ 70°C 封装/外壳:8-DIP（0.300"，7.62mm） 包装:管件 产品目录页面:1316 (CN2011-ZH PDF) |
| ISL6569ACBZ | 功能描述:IC REG CTRLR BUCK PWM 24-SOIC RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 切换控制器 系列:- 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:2,500 系列:- PWM 型:电流模式 输出数:1 频率 - 最大:275kHz 占空比:50% 电源电压:18 V ~ 110 V 降压:无 升压:无 回扫:无 反相:无 倍增器:无 除法器:无 Cuk:无 隔离:是 工作温度:-40°C ~ 85°C 封装/外壳:8-SOIC（0.154"，3.90mm 宽） 包装:带卷 (TR) |
| ISL6569ACBZ-T | 功能描述:IC REG CTRLR BUCK PWM 24-SOIC RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 切换控制器 系列:- 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:2,500 系列:- PWM 型:电流模式 输出数:1 频率 - 最大:275kHz 占空比:50% 电源电压:18 V ~ 110 V 降压:无 升压:无 回扫:无 反相:无 倍增器:无 除法器:无 Cuk:无 隔离:是 工作温度:-40°C ~ 85°C 封装/外壳:8-SOIC（0.154"，3.90mm 宽） 包装:带卷 (TR) |
| ISL6569ACR | 功能描述:IC REG CTRLR BUCK PWM 32-QFN RoHS:否 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 切换控制器 系列:- 标准包装:2,500 系列:- PWM 型:电流模式 输出数:1 频率 - 最大:500kHz 占空比:100% 电源电压:8.2 V ~ 30 V 降压:无 升压:无 回扫:是 反相:无 倍增器:无 除法器:无 Cuk:无 隔离:是 工作温度:0°C ~ 70°C 封装/外壳:8-DIP（0.300"，7.62mm） 包装:管件 产品目录页面:1316 (CN2011-ZH PDF) |
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