参数资料
型号: ISL8106IRZ
厂商: Intersil
文件页数: 11/15页
文件大小: 0K
描述: IC REG CTRLR BUCK PWM VM 16-QFN
标准包装: 75
系列: Robust Ripple Regulator™ (R³)
PWM 型: 电压模式
输出数: 1
频率 - 最大: 600kHz
电源电压: 7 V ~ 25 V
降压:
升压:
回扫:
反相:
倍增器:
除法器:
Cuk:
隔离:
工作温度: -40°C ~ 85°C
封装/外壳: 16-VQFN 裸露焊盘
包装: 管件
ISL8106
levels. Keep the metal runs from the LX terminals to the
output inductor short. The power plane should support the
input power and output power nodes. Use copper filled
polygons on the top and bottom circuit layers for the LX
nodes. Use the remaining printed circuit layers for small
signal wiring.
Locate the ISL8106 within 2 to 3 inches of the MOSFETs, Q1
and Q2 (1 inch or less for 500kHz or higher operation). The
circuit traces for the MOSFETs’ gate and source connections
Where:
- F OSC is the PWM switching frequency.
- R FSET is the F OSC programming resistor.
- 60 x [1 x 10 -12 ] is a constant.
Selection of the LC Output Filter
The duty cycle of a buck converter is ideally a function of the
input voltage and the output voltage. This relationship can be
written as:
D ( V IN ) = ----------------
from the ISL8106 must be sized to handle up to 4A peak
current. Provide local V CC decoupling between VCC and
V OUT
V IN
(EQ. 9)
GND pins. Locate the capacitor, C BOOT as close as practical
to the BOOT pin and the phase node.
Programming the Output Voltage
When the converter is in regulation there will be 600mV from
the FB pin to the GND pin. Connect a two-resistor voltage
divider across the VO pin and the GND pin with the output
Where:
- D is the PWM duty cycle.
- V IN is the input voltage to be converted.
- V OUT is the regulated output voltage of the converter.
The output inductor peak-to-peak ripple current can be
I PP = -----------------------------------------------------
node connected to the FB pin. Scale the voltage-divider
network such that the FB pin is 600mV with respect to the
GND pin when the converter is regulating at the desired
output voltage.
written as:
V OUT ? [ 1 – D ( V IN ) ]
F OSC ? L O
Where:
(EQ. 10)
R TOP + R BOTTOM
Programming the output voltage can be written as:
R BOTTOM
V REF = V OUT ? ---------------------------------------------------
(EQ. 5)
-
-
-
I PP is the peak-to-peak output inductor ripple current.
F OSC is the PWM switching frequency.
L O is the nominal value of the output inductor.
Where:
- V OUT is the desired output voltage of the converter.
- V REF is the voltage that the converter regulates to at the
FB pin.
- R TOP is the voltage-programming resistor that connects
from the FB pin to the VO pin. It is usually chosen to set
A typical step-down DC/DC converter will have an I PP of
20% to 40% of the nominal DC output load current. The
value of I PP is selected based upon several criteria such as
MOSFET switching loss, inductor core loss, and the
resistance the inductor winding, DCR. The DC copper loss of
the inductor can be estimated by:
the gain of the control-loop error amplifier. It follows that
R BOTTOM will be calculated based upon the already
P COPPER = [ I LOAD ] 2 ? DCR
(EQ. 11)
R BOTTOM = -------------------------------------
V OUT – V REF
selected value of R TOP.
- R BOTTOM is the voltage-programming resistor that
connects from the FB pin to the GND pin.
Calculating the value of R BOTTOM can now be written as:
V REF ? R TOP
(EQ. 6)
Programming the PWM Switching Frequency
The PWM switching frequency F OSC is programmed by the
resistor R FSET that is connected from the FSET pin to the
GND pin. Programming the approximate PWM switching
frequency can be written as:
The inductor copper loss can be significant in the total
system power loss. Attention has to be given to the DCR
selection. Another factor to consider when choosing the
inductor is its saturation characteristics at elevated
temperature. A saturated inductor could cause destruction of
circuit components, as well as nuisance OCP faults.
A DC/DC buck regulator must have output capacitance C O
into which ripple current I PP can flow. Current I PP develops a
corresponding ripple voltage V PP across C O, which is the
sum of the voltage drop across the capacitor ESR and of the
voltage change stemming from charge moved in and out of
the capacitor. These two voltages can be written as:
F OSC = ---------------------------------------------------------------
60 ? R FSET ? [ 1 × 10
]
R FSET = --------------------------------------------------------
60 ? F OSC ? [ 1 × 10
]
Δ V C = -----------------------------------
1
– 12
Estimating the value of R FSET can now be written as:
1
– 12
(EQ. 7)
(EQ. 8)
Δ V ESR = I PP ? E SR
and
I PP
8 ? C O ? F OSC
(EQ. 12)
(EQ. 13)
If the output of the converter has to support a load with high
pulsating current, several capacitors will need to be
11
FN9283.1
November 10, 2006
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