参数资料
型号: ISL8130IRZ
厂商: Intersil
文件页数: 15/24页
文件大小: 0K
描述: IC REG CTRLR BST FLYBK PWM 20QFN
标准包装: 75
PWM 型: 电压模式
输出数: 1
频率 - 最大: 1.4MHz
占空比: 100%
电源电压: 4.5 V ~ 5.5 V
降压:
升压:
回扫:
反相:
倍增器:
除法器:
Cuk:
隔离:
工作温度: -40°C ~ 85°C
封装/外壳: 20-VFQFN 裸露焊盘
包装: 管件
ISL8130
Functional Description
Initialization
The ISL8130 automatically initializes upon receipt of power. The
Power-On Reset (POR) function monitors the internal bias voltage
generated from LDO output (VCC5) and the ENSS pin. The POR
function initiates the soft-start operation after the VCC5 exceeds
the POR threshold. The POR function inhibits operation with the
chip disabled (ENSS pin <1V).
The device can operate from an input supply voltage of 5.5V to
24V connected directly to the VIN pin using the internal 5V linear
regulator to bias the chip and supply the gate drivers. For 5V
±10% applications, connect VIN to VCC5 to bypass the linear
regulator. Refer to Table 1.
If the REFIN is connected to an external voltage source between
0.6V to 1.25V, then this external voltage is used as the reference
voltage at the positive input of the error amplifier.
Power-Good
The PGOOD pin can be used to monitor the status of the output
voltage. PGOOD will be true (open drain) when the FB pin is within
±10% of the reference and the ENSS pin has completed the
soft-start ramp.
The CDEL is used to set the PGOOD active delay after soft-start. After
the ENSS pin completes its soft-start ramp, a 2μA current begins
charging the CDEL capacitor to 2.5V. The capacitor will be quickly
discharged before PGOOD goes high. The programmable delay can
be used to sequence multiple converters or as a LOW-true reset
signal.
INPUT
TABLE 1. INPUT SUPPLY CONFIGURATION
PIN CONFIGURATION
If the voltage on the FB pin exceeds ±10% of the reference, the
PGOOD will go low after 1μs of noise filtering.
5.5V to 24V Connect the input to the VIN pin. The VCC5 pin will provide
a 5V output from the internal LDO. Connect PVCC to VCC5.
Overcurrent Protection
5V ±10%
Connect the input to the VCC5 pin. Connect the PVCC and
VIN pins to VCC5.
The Overcurrent Protection (OCP) function protects the converter
from an overcurrent condition. The OCP circuit compares voltages
at the OCSET and the ISEN pin and signals an overcurrent
Shutdown
When ENSS pin is below 1V, the regulator is disabled with the
PWM output drivers tri-stated. When disabled, the IC power will
be reduced.
condition when ISEN drops below OCSET. Voltage at the OCSET pin
acts as a reference and is established by a resistor connected to
this pin from the input supply rail. An internal current source draws
a current I OCSET (typically 100μA) from the OCSET pin resulting in
a voltage at the pin given by Equation 1.
Soft-Start/Enable
V OCSET = V IN – R OCSET xI OCSET
(EQ. 1)
V ISEN = V IN – R CS xI IN
I OC = -------------------------------------------------
The ISL8130 soft-start function uses an internal current source
and an external capacitor to reduce stresses and surge current
during start-up.
When the output of the internal linear regulator reaches the POR
threshold, the POR function initiates the soft-start sequence. An
internal 10μA current source charges an external capacitor on
the ENSS pin linearly from 0V to 3.3V.
When the ENSS pin voltage reaches 1V typically, the internal
0.6V reference begins to charge following the dv/dt of the ENSS
voltage. As the soft-start pin charges from 1V to 1.6V, the
reference voltage charges from 0V to 0.6V. Figure 15 shows a
typical soft-start sequence.
Start-up into Pre-Biased Load
The ISL8130 is designed to power-up into a pre-biased load.
During the soft starting, the error amplifier compares the voltage
of the FB pin and the rising reference voltage given by the ENSS
pin. The COMP pin is hold down if the VFB is greater than the
rising reference voltage thus inhibiting switching.
The ISL8130 starts switching when the rising reference voltage
exceeds the FB pin voltage. ISL8130 operates in CCM afterwards.
The waveform for this condition is shown in Figure 19.
External Reference/Tracking
If REFIN pin is tied to VCC5, then the internal 0.6V reference is
used as the error amplifier non-inverting input.
15
The ISEN pin is connected to a current sensing resistor that senses
the current drawn from the input supply. This current sensing
resistor could be the r DS(ON) of the upper MOSFET if the ISL8130 is
used in a buck configuration. Please refer to the “Block Diagram”
on page 4 for more details. Voltage at the ISEN pin is given by
Equation 2.
(EQ. 2)
Combining Equations 1 and 2 gives the overcurrent trip point as
given in Equation 3.
R OCSET xI OCSET (EQ. 3)
R CS
When UGATE is high, current through the sense resistor increases.
If it increases enough to make V ISEN smaller than V OCSET , an
overcurrent event is registered for that clock cycle, a counter is
incremented and the UGATE pulse is immediately terminated. If an
overcurrent condition is registered for 8 consecutive cycles, the
ISL8130 enters into a soft-start hiccup mode. During hiccup, the
external capacitor on the ENSS pin is discharged. After the
capacitor is discharged, it is released and a soft-start cycle is
initiated. There are three dummy soft-start delay cycles to allow
the power devices to cool down and to alleviate the thermal stress
in overload or short circuit conditions. At the fourth soft-start cycle,
the output starts a normal soft-start cycle, and the output tries to
ramp.
It is important to connect the OCSET and ISEN traces right across
the current sensing resistor for good accuracy of the OCP
FN7954.3
October 5, 2012
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