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| 型号： | ISL8501EVAL1Z |
| 厂商： | Intersil |
| 文件页数： | 15/19页 |
| 文件大小： | 0K |
| 描述： | EVALUATION BOARD FOR ISL8501 |
| 标准包装： | 1 |
| 主要目的： | DC/DC，LDO 步降 |
| 输出及类型： | 3，非隔离 |
| 输出电压： | 3.3V，1.2V，1.8V |
| 电流 - 输出： | 1A，500mA，500mA |
| 输入电压： | 4.5 ~ 25 V |
| 稳压器拓扑结构： | 降压 |
| 频率 - 开关： | 500kHz |
| 板类型： | 完全填充 |
| 已供物品： | 板 |
| 已用 IC / 零件： | ISL8501 |
ISL8501
LDO Current Limit
The ISL8501 monitors and controls the pass transistor ’s
gate voltage to limit output current. The current limit for both
LDO1 and LDO2 is 700mA typical. The output can be
shorted to ground without damaging the part due to the
current limit and thermal protection features.
Undervoltage Protection
If the voltage detected on the buck regulator FB pin falls 15%
below the internal reference voltage, the undervoltage fault
condition flag is set. The fault protection circuitry checks the
overcurrent flag. If the overcurrent flag is set, the fault
monitor latches off the internal power MOSFET. The
regulator will not restart until either a POR restart or the EN
pin is cycled.
If the overcurrent flag is not set, an internal undervoltage
counter is set to 1. The fault controller continues to monitor
the FB pin for 4 clock cycles. If the fault condition persists,
the regulator is shutdown. The controller enters a recovery
mode similar to the overcurrent hiccup mode. No action is
taken for 4 soft-start cycles and the internal undervoltage
counter and fault condition flag are reset. A normal soft-start
cycle is attempted and normal operation continues if the fault
condition has cleared. If the undervoltage counter overflows
during soft-start, the converter is shut down and this hiccup
mode operation repeats.
Under-voltage protection only applies to the buck regulator
output, the two LDO outputs do not have undervoltage
protection.
Thermal Overload Protection
Thermal overload protection limits total power dissipation in
the ISL8501. There are three sensors on the chip to monitor
the junction temperature of the internal LDO, PWM switching
power N-Channel MOSFET, and LDO pass transistors.
When the junction temperature (T J ) of any of the three
sensors exceeds +150°C, the thermal sensor sends a signal
to the fault monitor.
The fault monitor commands the buck regulator to shut down
and the LDOs to turn off their pass transistors. The buck
regulator soft-starts and the LDO pass transistors turn on
again after the IC’s junction temperature cools by +20°C.
The buck regulator experiences hiccup mode operation and
the LDOs a pulsed output during continuous thermal
overload conditions. For continuous operation, do not
exceed the +125°C junction temperature rating.
Low Dropout Regulators
Each regulator consists of a 0.6V reference, error amplifier,
MOSFET driver, P-Channel pass transistor, and dual-mode
comparator. The voltage is set by means of an external
resistor divider on the FB_LDOx pins. The 0.6V band gap
reference is connected to the error amplifier ’s inverting input.
The error amplifier compares this reference to the selected
feedback voltage and amplifies the difference. The MOSFET
15
driver reads the error signal and applies the appropriate
drive to the P-Channel pass transistor. If the feedback
voltage is lower than the reference voltage, the pass
transistor gate is pulled lower, allowing more current to pass
and increasing the output voltage. If the feedback voltage is
higher than the reference voltage, the pass transistor gate is
driven higher, allowing less current to pass to the output.
Internal P-Channel Pass Transistor
Both the LDO regulators in the ISL8501 feature a typical
0.33 Ω r DS(ON) P-Channel MOSFET pass transistor. This
provides several advantages over similar designs using PNP
bipolar pass transistors. The
P-Channel MOSFET requires no base drive, which reduces
quiescent current considerably. PNP based regulators waste
considerable current in dropout when the pass transistor
saturates. They also use high base drive currents under
large loads. The ISL8501 does not have these drawbacks.
Integrator Circuitry
The ISL8501 uses external compensation capacitors for
minimizing load and line regulation errors and for lowering
output noise. When the output voltage shifts due to varying
load current or input voltage, the integrator capacitor voltage
is raised or lowered to compensate for the systematic offset
at the error amplifier. Compensation is limited to ±5% to
minimize transient overshoot when the device goes out of
dropout, current limit, or thermal shutdown. Place a 33nF
capacitor to GND from CC1 and CC2.
Application Guidelines
Operating Frequency
The ISL8501 operates at a fixed switching frequency of
500kHz.
LDO Regulator Capacitor Selection
Capacitors are required at the ISL8501 LDO Regulators’
input and output for stable operation over the entire load
range and the full temperature range. Use >1μF capacitor at
the input of LDO Regulators, VIN_LDO pins. The input
capacitor lowers the source impedance of the input supply.
Larger capacitor values and lower ESR provides better
PSRR and line transient response. The input capacitor must
be located at a distance of not more then 0.5 inches from the
VIN_LDO pins of the IC and returned to a clean analog
ground. Any good quality ceramic capacitor can be used as
an input capacitor.
The output capacitors used in LDO regulators are used to
provide dynamic load current. The amount of capacitance
and type of capacitor should be chosen with this criteria in
mind. The output capacitor selected must meet the
requirements of minimum amount of capacitance and ESR
for both LDOs. The ISL8501 is specifically designed to work
with small ceramic output capacitors. The output capacitor ’s
ESR affects stability and output noise. Use an output
capacitor with an ESR of 50m Ω or less to insure stability and
FN6500.1
July 12, 2007
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